Hardware implementation method and system for algorithm

Abstract

The invention discloses a hardware implementation method for an algorithm. The method comprises the steps that algorithm development is performed; hardware implementation evaluation of the algorithm is performed; according to a hardware implementation evaluation result, the algorithm is modified and / or optimized; hardware implementation is performed on the modified and / or optimized algorithm. The invention further discloses a hardware implementation system for the algorithm. The algorithm development and the hardware implementation are divided into two threads and synchronously performed; during the algorithm development, the objective and subjective visual performance of the video algorithm is estimated; meanwhile, hardware architecture designing is performed on the algorithm, whether the algorithm meets hardware constraints or not is checked, in other words, whether the algorithm meets the hardware constraints of hardware scale, data bandwidth, hardware implementability and the like or not is checked, joint optimization in algorithm level and hardware architecture level is performed simultaneously once it is found that a hardware architecture is beyond the implementability range of hardware resources, and therefore joint development and optimization of the algorithm and the hardware implementation are achieved.

Description

technical field [0001] The present application relates to the technical field of chip design, in particular to an algorithm hardware implementation method and system. Background technique [0002] In the current field of digital high-definition TV in China, most electronic companies adopt two research and development models. One model directly purchases chips from Taiwanese or foreign companies such as MTK, Pixelworks, and Trident for complete machine system integration. The other model is to conduct Chip design, but due to the lack of intellectual property rights and competitiveness in the core algorithm of video processing, IP chips can only be purchased at high prices for embedded system chip (SoC) system integration. These two models have not cultivated their core competitiveness in the field of video processing, and can only be at the lower end of the industry chain, subject to upstream IP providers and chip providers. [0003] Most companies with ASIC or SOC chip desi...

AI Technical Summary

Problems solved by technology

This process has two disadvantages. From the perspective of algorithm development, it is likely that the developed algorithm is not feasible in hardware, or the resulting hardware scale is huge, exceeding the constraints of the data bandwidth or scale of the chip; from the chip design. Look, if the algorithm is not changed after delivery, and the optimization effect is limited only by optimizing the hardware structure, it is necessary to formulate a more efficient development process for the joint development of video algorithms and hardware implementation.

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