Semiconductor device and method of forming the same

Abstract

Disclosed are a semiconductor device and a forming method thereof. The forming method includes: providing a semiconductor substrate, the bottom surface of which is provided with an inter-level dielectric layer, a gate structure comprising a metal gate electrode layer and sidewalls arranged on two sides of the gate structure; removing a certain thickness of the metal gate electrode layer from the gate structure to form an opening; forming a transition metal layer covering the bottom of the opening and allowing exposure of the sidewalls of the opening; forming a cap layer which covers the surface of the transition metal layer and which is flush with the surface of the inter-level dielectric layer; forming a conducting plug penetrating the whole inter-level dielectric layer and electrically connected with both a source region and a drain region. The gate structure and the sidewalls are arranged in the inter-level dielectric layer and are flush with the surface of the inter-level dielectric layer; the source region and the drain region are formed in the semiconductor substrate on two sides of the gate structure. The problem that short circuit between the metal gate electrode layer and the conducting plug affects the performance of a semiconductor device is effectively solved.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a semiconductor device and a forming method thereof. Background technique [0002] With the rapid development of ultra-large scale integration (ULSI, Ultra Large Scale Integration), the feature size (Feature Size) of components is getting smaller and the density is increasing, and the manufacturing process of integrated circuits is becoming more and more complex and sophisticated. The step process, especially the photolithography process, puts forward higher requirements. In this case, the self-alignment technology has attracted extensive attention because it can reduce the requirement for photolithographic precision, thereby reducing the area required for forming transistors. For example, in semiconductor process manufacturing, polysilicon self-aligned plugs are often formed using a self-alignment contact (SAC, self alignment contact) technology. [0003] T...

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Problems solved by technology

However, the performance of the above-mentioned semiconductor devices in the prior art is not ideal

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