Method for designing encoding circuits of (15,7) BCH codes

Abstract

The invention provides a method for designing encoding circuits of (15,7) BCH codes. The method for designing the encoding circuits comprises the steps that serial encoding circuits are constructed according to the generating polynomials of the (15,7) BCH codes; a first relational expression of redundancy check bits stored in registers after an i+1 information bit is input to the registers, redundancy check bits stored in all the registers after an i information bit is input to the registers and the input i+1 information bit is obtained for each register in the serial encoding circuits; a second relational expression of redundancy check bits stored in the registers after all the seven information bits are input to the registers, redundancy check bits stored in the registers when no information bit is input to the registers and all the seven information bits is obtained for each register in the serial encoding circuits; parallel encoding circuits are constructed according o the second relational expression. According to the method, the parallel circuits are used for replacing a traditional serial encoding scheme, and thus the encoding time is greatly shortened.

Description

technical field [0001] The invention relates to the technical field of error correction codes, in particular to a method for designing a coding circuit of a (15,7) BCH code. Background technique [0002] BCH (BoSe Ray-Chaudhuri Hocque7ghe15) is an efficient error correction code, and its cyclic encoding and decoding characteristics make it widely used in improving the reliability of communication, automatic control and memory. [0003] Usually BCH encoding and decoding is implemented in a serial manner. The encoding and decoding of this scheme requires a small circuit, but the encoding and decoding time depends on the clock cycle and the length of the codeword, so the circuit speed is extremely high. appears to be inapplicable. [0004] (15, 7) The BCH code can correct 2-bit errors, and a total of 8-bit redundant check bits are needed. In GF(2 4 ) field to construct a BCH code that can correct two errors, so t=2. In GF(2 4 ), primitive α and α 3 = α 2t-1 The correspond...

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Problems solved by technology

Not suitable for high-speed BCH encoding circuit

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