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A simulation-based fault injection attack method and device

A fault injection and fault technology, applied in the direction of software testing/debugging, can solve the problems of difficult to observe failure behavior, faulty devices, invisible signals, long time period, etc., and achieve the effect of intuitive and controllable fault injection.

Active Publication Date: 2017-05-17
BEIJING CEC HUADA ELECTRONIC DESIGN CO LTD
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AI Technical Summary

Problems solved by technology

[0007] From the above analysis, it can be seen that fault injection attacks usually require the use of special equipment to implement, and can only be implemented for chips in the form of silicon chips.
At the same time, fault injection attacks usually cause one or more faults inside the chip, the number of which is difficult to control, specific faulty devices and signals are invisible, and failure behavior is difficult to observe
For the evaluation of chip security protection design schemes, the required equipment is expensive, the required time period is extremely long, the attack effect is not direct, the analysis is complicated, and the technical level of the evaluation personnel is high.

Method used

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  • A simulation-based fault injection attack method and device

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Embodiment Construction

[0052] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments.

[0053] like figure 1As shown, a fault injection attack method based on simulation, its platform implementation frame diagram, including stimulus file library unit, fault library unit, stimulus file automatic loading unit, fault injection control unit, chip circuit under test, reference chip circuit, simulation An automatic data collection unit, a simulation process monitoring unit, a data result analysis unit and a simulation control unit.

[0054] The chip circuit to be tested refers to the chip circuit design with safety protection design to be evaluated. Including but not limited to: algorithm module unit, such as DES, AES, etc., storage control unit, CPU, or full chip, etc.

[0055] The reference chip circuit refers to a chip circuit design that does not inject fault attacks and has the same function as the chip circuit to be tested. The...

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Abstract

The invention discloses a method and a device for fault injection attack based on simulation. Under the condition of using no special instrument equipment, before the chip flowing, the fault injection attack is implemented, and a protecting effect for the anti-fault injection safety design of the chip is evaluated. According to the invention, the fault injection attack for the chip is realized in a simulating mode, and the evaluation and analysis for the protecting effect for the safety design of the chip are realized with the minimum cost and the highest efficiency in any link of a chip developing flow under the condition of being independent from the specific realization of a chip safety protection scheme.

Description

technical field [0001] The invention relates to chip system security attack technology, in particular to a simulation-based fault injection attack method and device. The method can be applied to the simulation verification process of the security chip, and ensures that the protection capability of the security chip against fault injection attacks is quantified by the simulation method before chip tape-out. Background technique [0002] In the field of information security, with the development of integrated circuits and the continuous development of application technology, security chips such as smart cards are increasingly carrying personal and commercial confidential information. With the continuous improvement of measurement and analysis technology, the attack on cryptography is no longer limited to the cryptography algorithm itself, and the attack on its carrier chip is becoming more and more mature and constantly developing. Therefore, the security of the chip itself ha...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F11/36
Inventor 黄慧敏陈波涛
Owner BEIJING CEC HUADA ELECTRONIC DESIGN CO LTD
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