A spaceborne integrated electronic cpu flip reinforcement system and method

Abstract

The invention provides a space-borne integrated electronic CPU (central processing unit) turnover reinforcement system and method. Errors of single events are detected and corrected in the running process of a space-borne integrated electronic CPU, and the single event effect resistance of the space-borne integrated electronic CPU in a severe radiation environment is greatly improved. By the aid of radiation-proof ASIC (application specific integrated circuit) technology and improved EDAC (error detection and correction) technology, an ARM (advanced RISC machine) chip, a FLASH and an SRAM (static random access memory) are organically integrated to form a high-reliability space-borne integrated electronic system, the system can effectively protect spatial single event effect, and the probability of the single events in running of the ARM chip in the severe radiation environment is greatly reduced.

Description

technical field [0001] The invention relates to the field of satellite integrated electronic anti-single particle design, in particular to a satellite-borne integrated electronic system and method. Background technique [0002] In some harsh electromagnetic and radiation environments, aerospace electronic devices will have single event effects. Single event effects include SEU (single event upset), SET (single event transient), SEL (single event latch), SED ( Single Event Disturbance) and other manifestations, among which SEU is a relatively common single event effect, SEU mainly occurs in storage devices and logic circuits, SEU can cause the logic state of the circuit to flip from "0" to "1", The logic error of the circuit leads to the error of the logic state of the system or even a catastrophic accident such as a system crash when it is serious. In recent years, aerospace technology has adopted multi-mode redundancy plus majority election technology, hot and cold backup ...

AI Technical Summary

Problems solved by technology

[0003] Among the above two implementation methods of EDAC, the first method depends on the function of the CPU chip, and is usually integrated in the CPU chip, requiring the external chip to meet the configuration requirements of the CPU, which has limitations in use; the second method has the feature of programmable , can be programmed according to customer needs, but because FPGA is also a single event sensitive component, if a single event event occurs on FPGA, the EDAC function realized by it will also be greatly affected

Images