Device for insertion delay, nuclear medicine imaging device, method for insertion delay, and correction method

Abstract

The timing accuracy of TDC can be improved. An apparatus for inserting a delay according to an embodiment including a signal generation circuit, a plurality of transfer elements and a delay column circuit. The signal generation circuit is configured to generate a start signal. A plurality of conveying elements are connected in a row, and each conveying element is provided with an input for receiving a stop signal. The delay column circuit includes one or more delay modules selected from a plurality of transport elements, at least one feedback line connected between at least one of the delay modules and the signal generation circuit, and a plurality of enable inputs. The plurality of start inputs are respectively set to corresponding ones of the delay modules. The delay chain circuit is configured to generate a delay amount based on a delay selection signal received at the start input and selecting the delay amount, and configured to provide the selected delay amount to a signal generation circuit configured to program the start signal. Entry delay.

Description

technical field [0001] Embodiments of the invention relate to a device for inserting delay, a nuclear medicine imaging device, a method for inserting delay, and a method for correcting. Background technique [0002] A time-to-digital converter (Time-to-Digital Converter: TDC) is often used to measure time by a gamma ray detector (detector). TDC converts the realization of an event accurately into a number that can be correlated with the time when the event occurred. To achieve this task, various methods exist. In order to achieve this task, the step of counting a number of very high-speed logic transitions between large clock cycles is used. Depending on the situation, it is sometimes desirable to show the occurrence of a series of events that occur in succession. For example, the time it takes for a rising signal to reach a predetermined threshold can be very useful information. [0003] The time-to-digital converter is implemented in various configurations, such as a c...

AI Technical Summary

Problems solved by technology

[0006] In order to improve the timing accuracy of TDCs based on single-edge delay columns, large offsets can be programmed into TDCs to take advantage, but there are significant manufacturing-induced variations in the speed of the circuits on the chip

This variation has an effect on the optimal delay between edges that should be used to extract maximum accuracy from the TDC circuit population

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