A qfn package structure of a power device

Abstract

The invention discloses a QFN packaging structure of a power device, which comprises a double-sided semiconductor chip, a frame, a first pin and a second pin, and the first pin and the second pin are respectively connected to the double-sided semiconductor chip through wires. Electrically connected, the double-sided semiconductor chip and the frame are bonded by conductive glue, and the inner side of the frame corresponding to the edge of the double-sided semiconductor chip is provided with an insulating glue groove and a right-angled trapezoidal overflow glue groove in turn, and the insulating glue groove is filled with Insulating glue, the right-angled trapezoidal glue overflow tank is used to collect the conductive glue and insulating glue overflowed from the double-sided semiconductor chip and the frame. The technical solution of the present invention does not have any damage to the double-sided semiconductor chip, provides insulation and isolation, and ensures that the conductive glue It cannot be short-circuited with the chip, which improves the product yield and makes the processing and production simpler and more convenient.

Description

technical field [0001] The invention relates to a QFN packaging structure, in particular to a QFN packaging structure of a power device. [0002] technical background [0003] As electronic circuit design tends to be highly integrated, the packaging volume requirements for devices are also increasing. Traditional button-type packaging, SMA / SMB / SMC and other surface-mount packaging double-sided semiconductor devices are gradually unable to meet the requirements of high-end circuit design PCB version. Layout needs, flatter and smaller packaging forms are urgently needed. Quadruple leadless flat package (QFN) is currently the most suitable chip-level packaging form, but this packaging technology is currently mainly used in integrated circuit packaging, but solid discharge Power devices such as tubes cannot be applied, because double-sided semiconductor devices are easy to form a short circuit with the chip when the conductive adhesive overflows. Some manufacturers have made a d...

AI Technical Summary

Problems solved by technology

[0003] As electronic circuit design tends to be highly integrated, the packaging volume requirements for devices are also increasing. Traditional button-type packaging, SMA / SMB / SMC and other surface-mount packaging double-sided semiconductor devices are gradually unable to meet the requirements of high-end circuit design PCB version. Layout needs, flatter and smaller packaging forms are urgently needed. Quadruple leadless flat package (QFN) is currently the most suitable chip-level packaging form, but this packaging technology is currently mainly used in integrated circuit packaging, but solid discharge Power devices such as tubes are not applicable, because double-sided semiconductor devices are easy to form a short circuit with the chip when the conductive adhesive overflows

Some manufacturers have made a discussion on this problem. The corner damage treatment of the semiconductor chip is done, and the overflow of the conductive glue is handled through the overflow tank, but there is still complicated processing, especially the damage to the semiconductor chip, and The yield rate is not high, and the short-circuit fault caused by the conductive adhesive may escape from the overflow tank is difficult to completely eliminate.

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