I2C (Inter-Integrated Circuit) bus circuit, implementation method and electronic equipment

A bus circuit and bus technology, applied in the direction of electrical digital data processing, instruments, etc., can solve problems such as inconvenient debugging and upgrading, data conflicts in online programming mode, etc., and achieve the effects of saving costs, solving data conflicts, and enhancing stability

Active Publication Date: 2015-08-12
BEIJING PICO TECH
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Problems solved by technology

[0003] The invention provides an I2C bus circuit, an implementation method and electronic equipment to solve the problems of data conflicts in online programming mode and inconvenient debugging and upgrading

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  • I2C (Inter-Integrated Circuit) bus circuit, implementation method and electronic equipment
  • I2C (Inter-Integrated Circuit) bus circuit, implementation method and electronic equipment
  • I2C (Inter-Integrated Circuit) bus circuit, implementation method and electronic equipment

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Embodiment Construction

[0039] The core idea of ​​the present invention is: aiming at the problems existing in the prior art, using the characteristics of the I2C (Inter-Integrated Circuit) bus, a time-division multiplexing mechanism based on the I2C bus is proposed to solve the problem of two masters and one slave system. It can effectively manage the data flow direction and facilitate the later upgrade and debugging of the system. The I2C bus is a two-wire serial bus used to connect microcontrollers and their peripherals. It is a special form of synchronous communication, which has the advantages of less interface lines, simple control method, small device package and high communication rate. The I2C bus communicates information between devices connected to the bus through the serial data (SDA) and serial clock (SCL) lines. The time-division multiplexing in the embodiment of the present invention means that at the first moment, the first host accesses a slave to perform data writing, and at the se...

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Abstract

The invention discloses an I2C (Inter-Integrated Circuit) bus circuit, an implementation method and electronic equipment. The I2C bus circuit comprises a first host computer, a second host computer and a slave computer, wherein the first and second host computers serve as master equipment; the slave computer serves as slave equipment; first I2C bus interfaces I2C1 are formed in the first and second host computers and the slave computer; the I2C1 of the first host computer and the I2C1 of the second host computer are connected with the I2C1 of the slave computer; second I2C bus interfaces I2C2 are further formed in the first and second host computers respectively; the I2C2 of the first host computer is connected with the I2C2 of the second host computer; the first host computer transmits a control instruction to the I2C2 of the second host computer through the I2C2 of the first host computer to enable the first and second host computers to multiplex the I2C1 of the slave computer in a time sharing manner. According to the I2C bus circuit, a time-sharing multiplexing mechanism is implemented to effectively manage the data direction, data is transmitted and stored, and in addition, a system can be conveniently debugged and upgraded in a later period.

Description

technical field [0001] The invention relates to the technical field of electronic circuits, in particular to an I2C bus circuit, an implementation method and an electronic device. Background technique [0002] In the circuit of the prior art, the configuration information of the system and the debugging and upgrading program are all in the offline programming mode. This offline programming mode requires a large number of tools and equipment to complete the programming, and needs to be powered off after the information programming is completed. The connection of data reading equipment is complicated and the cost is high; while the online programming mode has lower cost than the offline programming mode, does not require power-off connection, and is easy to operate, but the online programming mode has data storage and reading data. The problem of conflict and the inconvenience of later debugging and upgrading is urgently needed. Therefore, a technical solution that can solve t...

Claims

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Application Information

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IPC IPC(8): G06F13/40
Inventor 邓雪冰朱明代崇光
Owner BEIJING PICO TECH
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