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A multi-core processor scheduling method, device and terminal

A technology of a multi-core processor and a scheduling method, applied in the field of communication, can solve the problem that the performance and power consumption of multi-core processors cannot be balanced, and achieve the effect of increasing the probability of load distribution balancing and reducing power consumption.

Active Publication Date: 2019-06-14
ZTE CORP
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] The technical problem to be solved by the present invention is to provide a multi-core processor scheduling method, device and terminal to solve the disadvantages of multi-core processor performance and power consumption in the prior art.

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  • A multi-core processor scheduling method, device and terminal
  • A multi-core processor scheduling method, device and terminal
  • A multi-core processor scheduling method, device and terminal

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Embodiment Construction

[0020] The present invention will be described in further detail below in conjunction with the accompanying drawings. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

[0021] Such as figure 1 As shown, embodiments of the present invention provide a multi-core processor scheduling method, including:

[0022] S11. Determine the target frequency of the current core of the processor, where the target frequency is the operating frequency requested by the current core of the processor to be adjusted;

[0023] S12. If the target frequency of the current core is greater than the current operating frequency of each enabled core of the processor, determine whether the number of migratable processes in each enabled core of the processor satisfies a preset condition;

[0024] S13. When the number of migratable processes in each enabled core of the processor satisfies the preset condi...

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Abstract

The present invention relates to the technical field of communications. Provided are a multi-core processor scheduling method and apparatus, and a terminal, so as to solve the defect in a related art that considerations cannot be given to performance and power consumption of a multi-core processor at the same time. The method comprises: determining a target frequency of a current core of a processor, the target frequency being an operating frequency adjusted under a request of the current core of the processor; if the target frequency of the current core is higher than current operating frequencies of started cores of the processor, determining whether the number of migratable processes in the started cores of the processor meets a preset condition; and starting a new core for the processor in a case in which the number of migratable processes in the started cores of the processor meets the preset condition. The present invention can be used in all kinds of multi-core processors.

Description

technical field [0001] The present invention relates to the field of communication technology, in particular to a multi-core processor scheduling method, device and terminal. Background technique [0002] With the development of smart mobile terminals and the continuous enrichment of applications, the processor cores of smart mobile terminals have begun to develop from single-core to dual-core, quad-core and even eight-core, thus providing better performance for the operation of large-scale games and multi-threaded applications. Operating conditions. [0003] In order to improve the user experience, the operation of complex programs often requires a faster processor speed as a guarantee, that is, the processor needs to have a higher frequency, and this has various disadvantages: not only will it greatly increase the power consumption of the processor, but also It is easy to make the loads among the cores of the multi-core processor unbalanced with each other, causing some c...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F9/48G06F9/50
CPCG06F9/4893Y02D10/00
Inventor 张孝雷刘汝虎江桂凤
Owner ZTE CORP
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