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Multi-master arbitration method in dynamic reconfigurable high-rate serial bus

A technology of high-speed serial bus and arbitration method, which is applied in the field of multi-master arbitration, can solve the problems of unsatisfactory UM-BUS bus real-time performance, reliability, poor bandwidth utilization rate, and large transmission delay, so as to reduce the waste of communication resources, The effect of improving reliability and speeding up rotation speed

Active Publication Date: 2015-08-26
CAPITAL NORMAL UNIVERSITY
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  • Summary
  • Abstract
  • Description
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  • Application Information

AI Technical Summary

Problems solved by technology

For the UM-BUS bus, the above arbitration algorithm has problems such as low arbitration efficiency, large transfer delay, token loss, and poor bandwidth utilization, which cannot meet the real-time and reliability requirements of the UM-BUS bus.

Method used

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  • Multi-master arbitration method in dynamic reconfigurable high-rate serial bus

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specific Embodiment approach

[0025] Based on the working principle of the above-mentioned UM-BUS bus, a kind of specific implementation of the multi-master arbitration method of the present invention is as follows:

[0026] For the convenience of description, it is assumed that the UM-BUS bus supports 8 master nodes, the node number is defined as 0~7, the bus single-channel communication rate is 200Mbps, the working clock of the bus MAC sublayer is 100MHz, and the maximum transmission time of bus signals between nodes is 260ns. An arbitration time slot timer and a time slice timer of the arbitration time slot counter are set in the UM-BUS bus node controller to generate the timing and counting of the required arbitration time slots. In order to ensure that in the worst case, each node of the bus can detect the occupancy of the bus by the master node within one arbitration time slot, the timing length of the arbitration time slot is set to 500 ns in this embodiment. The value range of the arbitration slot...

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Abstract

The invention discloses a multi-master arbitration method in a dynamic reconfigurable high-rate serial bus. The multi-master arbitration method is characterized in that the multi-master arbitration method comprises the following steps: distributing a bus right to use to each main node through a variable time slot rotation method when a plurality of main nodes exist on the bus; when certain main node needs to occupy the bus to communicate, waiting for an arbitration time slot corresponding to the main node, beginning a communication process in the corresponding arbitration time slot, suspending the timing and the rotation of the arbitration time slot, and causing the arbitration time slot to be expanded to a communication time slice; and after the communication process ends, restoring the timing and the rotation of the arbitration time slot again. The multi-master arbitration method reduces the length of the arbitration time slot, can quicken the rotation speed of each main node on the bus, reduces communication resource waste, improves arbitration efficiency and improves the instantaneity of a bus system through the variable time slot rotation method.

Description

technical field [0001] The invention relates to a multi-master arbitration method in an embedded system bus, in particular to a multi-master arbitration method in a dynamically reconfigurable high-speed serial bus. Background technique [0002] The dynamic reconfigurable high-speed serial bus (UM-BUS) is a high-speed serial bus with remote expansion capability and a kind of high-speed serial bus proposed for system miniaturization and embedded integrated design that can organically unify redundant fault tolerance and high-speed communication. Such as figure 1 As shown, it adopts a bus topology based on M-LVDS technology, supports direct interconnection of multiple nodes, and can use up to 32 channels to transmit communications concurrently. During the communication process, if some channels fail, the bus controller can monitor them in real time, dynamically allocate data to the remaining effective channels for transmission, realize dynamic reconstruction, and dynamically fa...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/42
CPCG06F13/4282G06F2213/3604
Inventor 王晶张伟功李超周继芹邱柯妮朱晓燕徐远超
Owner CAPITAL NORMAL UNIVERSITY
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