multilevel inverter
A multi-level inverter and output circuit technology, applied to electrical components, AC power input conversion to DC power output, output power conversion devices, etc., can solve problems such as switch element damage
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Embodiment approach 1
[0022] figure 1 It is a circuit diagram showing the configuration of a 7-level inverter according to Embodiment 1 of the multilevel inverter according to the present invention. Such as figure 1 As shown, the 7-level inverter has: a main circuit 100U, 100V and 100W, a control signal generating device 200 , a plurality of photocouplers PC, and a safety device 300 .
[0023] figure 1 Here, a DC input voltage from a DC power supply (not shown) is supplied between the positive voltage terminal N1 and the negative voltage terminal N2. The neutral point N3 is fixed at an intermediate voltage (ground in the illustrated example) of the respective voltages of the positive voltage terminal N1 and the negative voltage terminal N2. A capacitor C1 is interposed between the positive voltage terminal N1 and the neutral point N3. A capacitor C2 is interposed between the negative voltage terminal N2 and the neutral point N3.
[0024] The main circuits 100U, 100V, and 100W are circuits that...
Embodiment approach 2
[0067] image 3 It is a block diagram showing the configuration of a 5-level inverter according to Embodiment 2 of the multi-level inverter according to the present invention. In this embodiment, the configuration of main circuits 100Ua, 100Va, and 100Wa is different from that of Embodiment 1 described above. The main circuit 100Ua has an output circuit unit 110a and a bridge unit 120a. The output circuit unit 100 a has switching elements Q11 , Q12 , Q13 , and Q14 inserted in series between the positive voltage terminal N1 and the negative voltage terminal N2 . In the bridge portion 120a, the reverse blocking type switching elements QR1 and QR2 are the same as those in the first embodiment described above. Switching element Q15 is inserted between the common connection point of the collector of reverse blocking switching element QR1 and the emitter of reverse blocking switching element QR2 and the node between switching elements Q11 and Q12. Switching element Q16 is inserte...
Embodiment approach 3
[0073] Figure 4 It is a block diagram showing the configuration of a 3-level inverter according to Embodiment 3 of the multi-level inverter according to the present invention. In this embodiment, the configuration of main circuits 100Ub, 100Vb, and 100Wb is different from that of Embodiment 1 described above. The main circuit 100Ub has an output circuit unit 110b and a bridge unit 120b. The output circuit unit 100b has switching elements Q21, Q22 inserted in series between the positive voltage terminal N1 and the negative voltage terminal N2. In the bridge portion 120b, the reverse blocking type switching elements QR1 and QR2 are the same as those in the first embodiment described above. The common connection point of the collector of the reverse blocking switching element QR1 and the emitter of the reverse blocking switching element QR2 is connected to the connection point between the switching elements Q21 and Q22.
[0074] The main circuit 100Ub can switch the switching...
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