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A multi-chip package structure and method for preparing the multi-chip package

A multi-chip packaging and chip technology, applied in semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, semiconductor devices, etc., can solve problems such as functional failure

Active Publication Date: 2019-07-19
MACRONIX INT CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Furthermore, defective components (e.g., defective chips) in a multi-chip package can render the overall package non-functional

Method used

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  • A multi-chip package structure and method for preparing the multi-chip package
  • A multi-chip package structure and method for preparing the multi-chip package
  • A multi-chip package structure and method for preparing the multi-chip package

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0046] The following provides a detailed description of embodiments of the present technology with the aid of illustrations.

[0047] Figure 1A and Figure 1B It is a side view and a top view respectively showing a three-dimensional multi-chip package 100 with multiple chip stacks. The three-dimensional multi-chip package 100 includes multiple chip stacks, such as chip stacks 110a, 110b, . . . and so on.

[0048] Each chip stack (eg, chip stack 110a) includes two or more vertically stacked chips (eg, chips 121a, 122a, and 123a). That is, each chip in a particular chip stack is located within a vertical projection of at least one other chip in that particular chip stack.

[0049]The chips in the chip stack of the three-dimensional multi-chip package 100 may have the same or different sizes. The chips in the chip stack of the three-dimensional multi-chip package 100 may be the same or different types of chips. In some embodiments, chip stacks (eg, chip stacks 110a, 110b, . ...

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Abstract

The invention discloses a multi-chip package structure and a method for preparing the same. The multi-chip package structure comprises a plurality of chip stacks which include a plurality of chips located in a plurality of chip layers; each chip stack comprises two or more chips; each chip is arranged in a vertical projection of at least one another chip in the chip stack and is arranged in a corresponding chip layer; each chip stack comprises horizontal conductors which extend to the perimeter zone of the periphery of the chip stack; chips in a specific chip layer are electrically connected with horizontal conductors arranged in the specific chip layer; each chip stack also comprises vertical conductors which are located in the perimeter zone and are electrically connected with horizontal conductors located in at least two chip layers; the multi-chip package structure also comprises a control chip which is electrically connected with at least one chip in the chip stacks.

Description

technical field [0001] The invention relates to a three-dimensional multi-chip package including multi-chip stacking, especially a multi-chip package structure and a method for preparing the multi-chip package. Background technique [0002] In a 3D multi-chip package, multiple chips (die) may have been vertically stacked and interconnected to form a single device. The stacked chips can be interconnected through electrical connections, such as bonding wires located around the edges of the stacked chips. Three-dimensional multi-chip packaging can achieve higher storage capacity and / or functionality in a small form factor. [0003] A through silicon via (Through-Silicon Via, TSV) is a vertical electrical connection passing through a silicon chip. TSVs provide shorter electrical connections between stacked chips than wire bonding. The shorter signal transmission time and lower resistance and parasitic capacitance of the shorter electrical connection can give wider connection ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/538H01L25/065H01L21/768
Inventor 陈士弘
Owner MACRONIX INT CO LTD