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A pcb board and device compatible with different bit width ddr

A PCB board, double-speed synchronization technology, applied in the field of PCB boards and devices, can solve the problems of low cost performance, poor compatibility, and low PCB board reusability, and achieve the goals of reducing costs, improving reusability and compatibility Effect

Active Publication Date: 2019-03-08
ACTIONS ZHUHAI TECH CO
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] Embodiments of the present invention provide a PCB board and device compatible with DDRs of different bit widths, which is used to solve the problem that the PCB layout in the prior art must be DDRs with the same bit width, resulting in low reusability and low compatibility of PCB boards. Poor, and cost-effective problem

Method used

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  • A pcb board and device compatible with different bit width ddr
  • A pcb board and device compatible with different bit width ddr
  • A pcb board and device compatible with different bit width ddr

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0075] refer to Figure 4 , in the 32bit DDR memory controller compatible with 8bit / 16bit DDR3PCB board, among them, the first type of DDR is DDR3 with 16bit bit width, and the second type of DDR is DDR3 with 8bit bit width,

[0076] The address command line is connected to the address command pin of the main control chip and each address command pad (ie CAsignal) in the PCB board;

[0077] The first data line group is connected to a first-type data pin (that is, data pins corresponding to Byte1 and Byte2) in the main control chip and a group of basic data blocks in a first-type DDR (16bit wide DDR3). point(Byte1 in Location1, Byte2 in Location2);

[0078] The second data line group is used to connect a second type of data pin (data pins corresponding to Byte0 and Byte3) in the main control chip and a group of basic data blocks in a second type of DDR (DDR3 with a bit width of 8 bits) Solder joints and a group of basic data block solder joints (Byte0 in Location1, Byte3 in L...

Embodiment 2

[0081] refer to Figure 5 , in a 32bit DDR memory controller compatible with 8bit / 16bit DDR3PCB boards, the first type of DDR is DDR3 with 16bit width, and the second type of DDR is also DDR3 with 16bit width.

[0082] The address command line is connected to the address command pin of the main control chip and each address command pad (ie CAsignal) in the PCB board;

[0083] The first data line group is connected to a first-type data pin in the main control chip (that is, data pins corresponding to Byte0 and Byte3) and a group of basic data blocks in a first-type DDR (DDR3 with a 16-bit bit width). Point(Byte0 in Location1, Byte3 in Location2);

[0084] The second data line group is used to connect a second type of data pin (data pins corresponding to Byte1 and Byte2) in the main control chip with a group of basic data blocks in a second type of DDR (16bit wide DDR3) The solder joints and a group of basic data block solder joints (Byte1 in Location1, Byte2 in Location2) in ...

Embodiment 3

[0089] refer to Figure 6 , in the 32bit DDR memory controller compatible with 16bit / 32bit DDR3PCB board, the first type of DDR is DDR3 with 32bit width, and the second type of DDR is DDR3 with 16bit width.

[0090] The address command line is connected to the address command pin of the main control chip and each address command pad (ie CAsignal) in the PCB board;

[0091] Since the second type of DDR is 16bit wide DDR3, therefore,

[0092]The second data line group connects a second type of data pin (data pins corresponding to Byte0 and Byte2) in the main control chip and a group of basic data block solder joints in a second type of DDR (16bit wide DDR3) (Byte0 in Location0, Byte2 in Location2) and a group of basic data block solder joints (Byte0, Byte2 in Location1) that are not connected to the first data line group in the first type of DDR;

[0093] The first data line group is connected to a first-type data pin in the main control chip (that is, the data pins correspond...

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Abstract

The invention discloses a PCB board and a device compatible with DDRs of different bit widths. The PCB board comprises a main control chip and further comprises an address command wire used for connecting an address command pin of the main control chip with each address command solder joint of the PCB board, at least one first data line group and at least one second data line group. The at least one first data line group is used for connecting one of a first kind of data pins with one of a group of basic data block solder joints in the first kind of DDRs. The at least one second data line group is used for connecting one of a second kind of data pins of the main control chip with one of a group of basic data block solder joints in the second kind of DDRs, as well as with a group of data block solder joints not connected with a first data line group in the first kind of DDRs. Therefore, wiring is performed for DDRs of different bit widths in the PCB board to ensure that a user can performing welding operation by selecting DDRs of different bit widths according to different users. Cost is reduced. Reusability and compatibility of the PCB board are enhanced.

Description

technical field [0001] The invention relates to the field of PCB board layout, in particular to a PCB board and a device compatible with DDRs of different bit widths. Background technique [0002] With the rapid development of terminal equipment such as smart phones and tablet computers, users have higher and higher requirements for the performance of the printed circuit board (PCB) in the terminal equipment, but the requirements for the cost of the PCB board are getting lower and lower. , and DDR is another key device besides the main control chip in the smallest system, and its cost and layout are particularly important. [0003] The PCBLayout of the existing minimum double-rate synchronous DDR (Double Data Rate, DDR) system must be DDR with the same bit width, that is, all PCB Layouts are 8bit DDR3 devices, or all are 16bit DDR3 devices, or all are 32bit DDR3 devices. [0004] Due to the unstable price of DDR3 with different bit widths, when the total memory capacity of...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F13/40G06F13/16
Inventor 钟旭谭顺伟
Owner ACTIONS ZHUHAI TECH CO