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Multi-DSP data exchange apparatus based on FPGA

A data exchange and data technology, applied in the direction of data exchange network, digital transmission system, electrical components, etc., can solve the problems of reduced reliability, poor anti-interference ability, and increased system cost, and achieve simple control, less FPGA resources, and Stable and reliable data transmission

Inactive Publication Date: 2016-05-04
JIANGSU LVYANG ELECTRONICS INSTR GROUP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0002] With the advent of the digital age, the application of DSP almost covers the entire electronic field. In many occasions that require real-time data processing, even if the most advanced DSP chips are used, the single-chip processor cannot meet the needs of real-time processing of large amounts of data. Multiple DSPs work in parallel to complete the task
When the number of DSPs increases, on the one hand, it will occupy more RAM resources of the FPGA, which increases the system cost; on the other hand, due to parallel high-speed data transmission, the anti-interference ability is poor, and the transmission reliability is reduced

Method used

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  • Multi-DSP data exchange apparatus based on FPGA
  • Multi-DSP data exchange apparatus based on FPGA
  • Multi-DSP data exchange apparatus based on FPGA

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Embodiment Construction

[0010] figure 1 It is a multi-DSP parallel processing system, which consists of large-scale programmable device FPGA, multiple DSPs and external SDRAM memory, FPGA program FLASH, DSP program FLASH, thousand Ethernet ports, debugging serial ports, data input and data output interfaces, etc. Synchronous serial interface (SPORT) appears in various types of DSP as a standard peripheral hardware, which provides convenience for communication between DSPs. Each synchronous serial interface is composed of a transmitter and a receiver, generally composed of 6 signal lines, which are sending data (DT), receiving data (DR), sending clock (TCLK), receiving clock (RCLK), sending Frame Synchronization (TFS) and Receive Frame Synchronization (RFS). When in use, the corresponding signals of the synchronous serial interfaces of different DSPs are interconnected through switches inside the FPGA, and the relevant registers are configured to ensure that the sending and receiving clocks, synchron...

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PUM

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Abstract

The invention belongs to the field of digital signal processing, and specifically relates to a multi-DSP data exchange method based on an FPGA. A multi-DSP data exchange apparatus based on an FPGA comprises a programmable device FPGA, DSP memories, external SDRAM memories, an FPGA program FLASH, a DSP program FLASH, a gigabit Ethernet interface, a debugging serial port, a data input interface, and a data output interface, the programmable device FPGA is connected with the DSP memories, the external SDRAM memories, the FPGA program FLASH, the DSP program FLASH, the gigabit Ethernet interface, the debugging serial port, the data input interface, and the data output interface, and the debugging serial port is connected with a serial port switch. The apparatus is advantageous in that the synchronous serial interface switch is realized in the FPGA, effective data exchange between a plurality of DSPs is realized, the occupied FPGA resources are less, the data transmission is stable and reliable, and the control is simple.

Description

technical field [0001] The invention belongs to the field of digital signal processing, in particular to an FPGA-based multi-DSP data exchange method. Background technique [0002] With the advent of the digital age, the application of DSP almost covers the entire electronic field. In many occasions that require real-time data processing, even if the most advanced DSP chips are used, the single-chip processor cannot meet the needs of real-time processing of large amounts of data. Multiple DSPs work in parallel to complete the task. When the number of DSPs increases, on the one hand, it will occupy more RAM resources of the FPGA, which increases the system cost. On the other hand, due to parallel high-speed data transmission, the anti-interference ability is poor, and the transmission reliability is reduced. Contents of the invention [0003] The technical effects of the present invention can overcome the above-mentioned defects, and provide a multi-DSP data exchange devic...

Claims

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Application Information

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IPC IPC(8): H04L12/931
Inventor 窦俊宋云衢
Owner JIANGSU LVYANG ELECTRONICS INSTR GROUP