Recovery Circuit for Improving Temperature Instability of Negative Bias Voltage in Digitally Controlled Oscillating Circuit

Abstract

The invention discloses a recovery circuit for improving the negative bias temperature instability of a numerically controlled oscillator circuit, comprising a numerically controlled oscillator circuit and an NBTI effect recovery unit. The numerically controlled oscillator circuit comprises a first NAND gate, eight inverters, 32 ternary gate inverters, and 256 ternary inverters. The NBTI effect recovery unit comprises a first PMOS tube, a second PMOS tube, and first and second recovery signal input terminals. Under control of two recovery control signals, the sources of two PMOS tubes in the ternary inverters are connected to low level and the gates are connected to high level, and the gate and source voltages are positively biased, so that the NBTI effect recovery speed of two PMOS tubes in the ternary inverters of the numerically controlled oscillator circuit is increased effectively, and negative drift of the threshold voltage of the PMOS tubes is restrained effectively. The performance of the circuit is strengthened on the whole, and the circuit is simple in structure, and has very high practical value and a broad market prospect.

Description

technical field [0001] The invention belongs to the field of semiconductor memory, and in particular relates to a recovery circuit for improving the temperature instability of a negative bias voltage of a digitally controlled oscillation circuit. Background technique [0002] The NBTI (negative bias temperature instability) effect occurs in PMOS devices. When the gate of the device is in a negative bias state, the saturated drain current Idsat and transconductance Gm of the device decrease continuously, and the absolute value of the threshold voltage increases continuously. [0003] According to the international technology roadmap for semiconductors (ITRS) prediction, with the continuous reduction of semiconductor process size and further refinement of semiconductor process, NBTI effect has gradually become the primary factor affecting the reliability of chip life cycle. It is generally considered that the NBTI effect is a gradual process with partial reversibility, that is...

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Problems solved by technology

[0006] As shown in Figure 2(a), it is a circuit diagram of a traditional digitally controlled oscillator, and Figure 2(b) and Figure 2(c) respectively represent the internal circuit structure of the inverter and the tri-state inverter in the digitally controlled oscillator circuit As shown in the figure, when the MOS tube 101, MOS tube 102, and MOS tube 103 are all gated, their sources are all connected to the high voltage VDD, and their gates are all connected to the low level 0V during normal operation. In this state, the PMOS transistor will be affected by the NBTI effect, which seriously affects the delay time and service life of the PMOS transistor, resulting in a decrease in the accuracy of the output frequency of the digitally controlled oscillation circuit and affecting circuit performance.

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