A device for encrypting and decrypting AES with equal length of plain and ciphertext

Abstract

The invention discloses an AES encryption and decryption device having equal-length plaintexts and ciphertexts, relating to the technical field of information security. The device comprises an encryption module, a decryption module and a key management module; the encryption module comprises at least one first data input module, at least one first data management module, at least one AES algorithm encryption module and at least one first data sending module; the decryption module comprises at least one second data input module, at least one second data management module, at least one AES algorithm decryption module and at least one second data sending module; and the key management module is used for storing keys sent by a host, and sending multiple sets of keys to the encryption module or the decryption module according to the application of the host. In the AES encryption and decryption device disclosed by the invention, various core modules are realized through FPGAs; the FPGAs are communicated with the host through a Pcie interface; the host cannot read the keys stored by the key management module; therefore, the key exposure risk is avoided; and the safety is improved.

Description

Technical field [0001] The present invention relates to the technical field of information security, in particular to an AES encryption and decryption device with the same length of plain and cipher text. Background technique [0002] The Advanced Encryption Standard (English: Advanced Encryption Standard, abbreviation: AES) was established as an effective standard by the National Institute of Standards and Technology (NIST) on May 26, 2002. In 2006, the advanced encryption standard has become one of the most popular algorithms in symmetric block key encryption. [0003] With the rapid development of information technology, the AES algorithm is widely used in various industries, but the usual applications are realized through software. Although the current CPU computing speed and number of cores have been greatly enhanced, the calculations processed by the CPU are also more complex, making the CPU resources still quite precious, so the hardware implementation of the AES algorithm ...

AI Technical Summary

Problems solved by technology

Although the computing speed and the number of cores of the current CPU have been greatly enhanced, the operations processed by the CPU are also more complex, making CPU resources still quite precious, so it has become a task to accelerate the CPU by implementing the AES algorithm through hardware. very meaningful topic

[0004] The AES algorithm is a symmetric block cipher encryption algorithm. The data used for encryption and decryption needs to be grouped. The length of the data block is fixed at 16 bytes. When the length of a data block is less than 16 bytes, it needs to be filled. The result is that the ciphertext is longer than the plaintext, making it impossible to use the AES algorithm when the plaintext ciphertext is equal in length.

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