Memory element and manufacturing method thereof

Abstract

The invention discloses a memory element and a manufacturing method thereof. The memory element comprises a plurality of silicon-containing conductive layers and the plurality of silicon-containing conductive layers are parallel to each other and vertically stacked on the substrate. A plurality of serial selection lines are located over the silicon-containing conductive layers and are extending along a first direction. A plurality of serial lines are vertical to the silicon-containing conductive layers and the serial selection lines, and are electrically connected to the serial selection lines. A plurality of bit lines are located at the serial selection lines and are extending along a second direction. Multi-set and multi-layer plug structures are arranged along the first direction to respectively sandwich the plurality of serial lines between every two adjacent multi-layer plug structures. Each multi-layer plug structure is composed of a plurality of via plugs and each via plug is correspondingly connected with one silicon-containing conductive layer. The memory element further comprises a plurality of metal word lines. Each metal word line extends along the first direction and is electrically connected with one via plug connected with the same silicon-containing conductive layer.

Description

technical field [0001] The present invention relates to a semiconductor element and its manufacturing method, and in particular to a memory element and its manufacturing method. Background technique [0002] Non-volatile memory devices, such as flash memory, have the property of not losing information stored in memory cells when power is removed. It has been widely used in solid-state mass storage applications for portable music players, mobile phones, digital cameras, etc. In order to meet the demand for higher density storage capacity, there are currently various three-dimensional memory devices with different structures, such as single-gate memory cells, double-gate memory cells, and wraparound gate memory cells. A three-dimensional flash memory element of a surrounding gate memory cell is proposed. [0003] Three-dimensional memory elements, such as vertical-channel (VC) three-dimensional NAND flash memory elements, have many layers of stacked layers (memory layers) st...

AI Technical Summary

Problems solved by technology

The setting of the etched channel will occupy the formation space of the memory cell and affect the storage capacity of the element

In addition, the sacrificial layer is easy to remain in the multi-layer stack stru

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