13 results about "Serial line" patented technology

An integrated circuit may include a phase shifting / partial beamforming network circuit and a plurality of true time delay (TTD) circuits. The beamforming circuit may include a plurality of receive inputs. Each receive input may be coupled to one of a plurality of antenna elements. The beamforming circuit may include a plurality of receive / transmit connectors, each of which may correspond to a beam of a plurality of beams. The beamforming circuit may include a plurality of transmit outputs each of which may be coupled to one of the plurality of antenna elements. Each TTD circuit may include a first connection coupled to one of the receive / transmit connector outputs and a second connection coupled to one of a plurality of serial lines. Each TTD circuit may be configured to apply one or more of an integer delay or a fractional delay to data received from the receive / transmit connector or the serial line.

The invention relates to the field of radar level meters, and discloses a radar level meter system with blowing and dedusting functions, which comprises a plurality of test nodes and is used for simultaneously testing the heights of materials in a plurality of containers, and each test node comprises a radar level meter, a blowing module and a wireless data transmission radio, the radar level meter is connected with one wireless data transmission radio station through an RS485 bus, the control room PC is connected with the other wireless data transmission radio station through a USB-to-RS485 serial port line, and the air blowing module is used for blowing air to remove dust on the surface of a radar lens of the radar level meter. The radar level meter and the bottom mounting part of the blowing module are fixed together by screwing the mounting ring, so that the radar level meter and the blowing module are fixed into a whole; when the direct-current brushless motor works, the air supply duct of the bottom installation part continuously blows air to the surface of a lens of the radar level meter.

The invention discloses a cluster control system and equipment based on an SWD interface and a storage medium, and relates to the technical field of electronic equipment control, and the cluster control system comprises a control node, at least one controlled node and a communication network. The control node comprises a resource scheduling and task management module, a debugging access port control module and an instrument tracking data receiving module; the controlled node comprises a task execution module and an instrument tracking data sending module; and the communication network is a physical communication link based on a serial wire debugging SWD interface, is used for connecting the control node and all the controlled nodes, and is configured to multiplex a debugging access port of the controlled nodes as a communication channel during operation. And communication coordination is complex, and high real-time performance and complex calculation are difficult to consider at the same time.

This invention pertains to the field of smart community security, and particularly relates to a method and apparatus for collecting video information in smart communities that supports 5G communication. The information collection device in the method is connected between the smart community switch and the community monitoring center, or connected to the smart community switch itself. Specifically, it is configured with a traffic exchange and collection module to exchange and forward traffic on the uplink and downlink serial lines, or to actively pull video streams from cameras. It supports serial or direct access for information collection, thus solving the problems of difficult data interface coordination and network line congestion or delays in the smart community video information collection process. This facilitates its promotion and deployment in complex smart community scenarios.

The present application relates to FPGA technical field, specifically relates to a kind of minimum FPGA CPU verification system and method, including by CPU, RAM and UART composition FPGA end and be equipped with control software controller software PC end, the UART port of the FPGA end is connected with the serial port of the PC end by serial line, when working, FPGA end CPU power-on bootcode, bootcode code cyclically waits UART data.PC end Controllersoftware sends command, is given UART by COM mouth.Transmission.FPGA end CPU receives the data of UART, executes the processing function of corresponding command.The FPGA CPU verification system of the present application is extremely simple, only CPU, UART, RAM can be composed, and has the convenient characteristics of updating test program, has very strong market application prospect.

The invention relates to the technical field of scribers, and particularly discloses an electromagnetic adsorption positioning steel bar spacing scriber and a using method thereof.The electromagnetic adsorption positioning steel bar spacing scriber comprises a scribing mechanism, and the scribing mechanism comprises an equipment body, a movable annular plate and a connecting mechanism, the connecting mechanism comprises a first positioning disc and a second positioning disc which are arranged on the equipment main body, a positioning notch is formed in the first positioning disc, and an electromagnet panel is arranged in the positioning notch; according to the device, by arranging the device main bodies with the first positioning disc and the second positioning disc, when multiple devices need to be controlled at the same time to conduct sequence marking operation, the second positioning disc on one device main body can be aligned with the positioning notch in the other device main body to conduct embedded installation, and after alignment installation is completed, the second positioning disc is fixed to the positioning notch in the other device main body; and the electromagnet can be started through the electromagnetic adsorption control panel so that the electromagnet can be tightly adsorbed with the second positioning disc, and it can be guaranteed that the two scriber devices are stably connected and cannot loosen or fall off.

The embodiment of the invention discloses an access authentication circuit for serial line debugging. The circuit comprises an output control module, an output module and a sequence detection module, the input end of the sequence detection module is connected with a data line, the output end of the sequence detection module is connected with the first control end of the output control module, the second control end of the output control module is connected with the microcontroller, the output end of the output control module is connected with the control end of the output module, and the input end of the output module is connected with a clock line. A first output end of the output module is connected with a post-stage debugging circuit, a second output end of the output module is connected with a clock end of the sequence detection module, and the output control module is used for controlling a clock signal output by the first output end of the output module to be valid when a sequence value detected by the sequence detection module is equal to a preset value. And the clock signal output by the second output end of the output module is invalid. According to the scheme, only authorized users can access the internal resources of the MCU through the SWD, so that the security of the system is improved.

The present invention belongs to the technical field of display driver chips, and specifically discloses an LED display driver chip, comprising a shell, wherein an integrated circuit board is fixedly connected to the interior of the shell via a column, a display driver chip body is mounted on the top of the integrated circuit board, a serial interface is provided on one side of the integrated circuit board, and the serial interface extends to the outside of the shell away from one end of the integrated circuit board; a fixing sleeve is fixedly connected to the outer side of the shell, and the fixing sleeve cover is provided on the outside of the serial interface; a fixing mechanism for firmly fixing a serial line connector is provided on the top of the fixing sleeve, a clamping plate is fixedly connected to the outside of the shell in the fixing sleeve, and the clamping plate is clamped with a clamping groove provided on the serial line connector; the present invention can prevent the serial line connector and the serial interface from becoming loose, can ensure continuous data transmission, and thus can solve the problem of screen distortion on the display screen.

The invention discloses a slave station address self-identification system and a slave station address self-identification method. The system is composed of a master station and a plurality of slave stations, besides a basic communication bus between the master station and the slave stations, the master station outputs power signals, addresses of the slave stations can be automatically allocated through voltage dividing networks and analog quantity acquisition units on the slave stations, and the number of the slave stations and access positions of the slave stations in the whole system can be identified. According to the invention, in a short-distance communication state of the master-slave device in a serial line mode, a device for address setting on the slave station device can be omitted, and at the same time, a slave station address does not need to be specially set on the application site of the master-slave device, so that the risk that the master-slave system cannot work normally due to address setting conflicts can be reduced, and plug-and-play is realized. The method can be widely applied to various systems which are in close-range master-slave communication and in which the slave station needs external address setting, and the hardware design cost of slave station equipment in master-slave network communication is greatly reduced.

A command device is connected with a serial line to a driving device for controlling operations of a plurality of first switching elements and one or more second switching elements. The command device includes a command signal generator to generate a plurality of first command signals and one or more second command signals, an encoder to generate encoded data by encoding at least some signals of the plurality of first command signals and the one or more second command signals, and a command-device serializer to generate serial command data through serial conversion of the encoded data and transmit the serial command data to the driving device via the serial line.

The invention discloses a multi-host RPA coordination control terminal, which comprises standalone version RPA software deployed on a micro control host, the micro control host is connected with a camera through a USB cable, the camera is aligned with a target host display screen, the micro control host is connected with an identity authentication module through a USB cable, and the identity authentication module is connected with an identity authentication module through a USB cable. The keyboard and mouse integrated interface module is connected with a plurality of target hosts through USB cables on one hand, and is connected with the micro control host through a serial port line on the other hand, and the operation panel is connected with the micro control host through a USB cable; by means of the device, the purposes of flexible arrangement, high adaptability, small occupied space, convenient use, high response speed and reliable control are achieved.

The present invention provides a method and system for online scanning and configuration of nodes applied to CAN bus communication, including the following steps: S1: The master controller sends a downstream CAN broadcast scan message based on the CAN bus; S2: In a single scan cycle, the preceding first node device receives the downstream CAN broadcast scan message based on the forward unidirectional serial line and sets its own position number to n; S3: The first node device transmits the downstream CAN broadcast scan message and its own position number information to the second node device adjacent to the rear of the first node device through the backward unidirectional serial line, and the second node device sets its own position number to n + 1; S4: Each node device repeats step S3 until all node devices have completed setting their own position numbers. All node devices respectively send upstream CAN heartbeat messages based on the CAN bus, and the master controller obtains the configuration data corresponding to the position numbers and device IDs of all node devices based on the upstream CAN heartbeat messages.

This disclosure provides a memory device and an operational method thereof for performing multiply-accumulate operations. The memory device includes: at least one memory string, multiple data lines, and a serial line. The memory string includes multiple memory cells. Each memory cell has multiple stored values. The multiple data lines are respectively connected to the multiple memory cells to receive multiple data signals. The multiple data signals have multiple input values. When the multiple data signals are input to the multiple memory cells, multiple nodes between the multiple memory cells are at the same voltage level. The serial line is connected to at least one memory string to receive a sensing signal and obtain a measured value. The measured value represents the sum of the products of these input values ​​and these stored values. The multiple data signals and the sensing signal are received at different times.