Method for debugging 8051 core-based system on chip (SOC) on line

A system-on-chip, monitor-51 technology, applied in the detection of faulty computer hardware, etc., can solve problems such as complex structure, and achieve the effect of solving mismatch, saving time and manpower, and being simple and convenient.

Inactive Publication Date: 2011-02-02
SHANDONG UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

The structure of the system is complex, and it is necessary to design a JTAG module that occupies a large system area resource in

Method used

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  • Method for debugging 8051 core-based system on chip (SOC) on line
  • Method for debugging 8051 core-based system on chip (SOC) on line

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Embodiment

[0028] A kind of online debugging method based on 8051 core system on chip, such as figure 1 As shown, the system-on-chip with 8051 core processor is used as an application platform, and the system includes an upper computer (PC) 2, 232 level conversion circuits 3 and a system-on-chip, and the system-on-chip includes an 8051-core processor 5, a memory 6, a clock Reset circuit 4 and asynchronous serial communication module 7, clock reset circuit 4 provides clock and reset signal for system-on-chip; 8051 core processor 5 is connected with memory 6, clock reset circuit 4 and respectively by data line, address line and read-write control lead wire The asynchronous serial communication module 7 is connected; The upper computer (PC) 2 is connected to the 232 level conversion circuit 3 through the computer serial interface and the serial data line, and the level conversion is carried out through the 232 level conversion circuit 3, and its output The terminal is connected to the seria...

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Abstract

The invention relates to a method for debugging an 8051 core-based system on chip (SOC) on line, and belongs to the technical field of integrated circuit design. On-line debugging software on a personal computer (PC) finishes communication with an asynchronous serial interface in the SOC through a serial line so as to realize on-line debugging. The system comprises the on-line debugging software on the PC, an RS232 conversion circuit and the 8051 core-based SOC. The method realizes the 51 instruction analysis, breakpoint processing, operation processing and content debugging of the SOC. Software codes are debugged on line by a few data lines after the mass production of chips is realized, so that the debugging work of the system is greatly simplified, the debugging time is shortened, the function optimization of the system is facilitated and the fault tolerance of the system is enhanced. Meanwhile, the scheme is simple and reliable, avoids using a logic analyzer and automatic test equipment to cause high cost, and can be applied to various SOCs taking an 8051 core as a control core.

Description

technical field [0001] The invention relates to an online debugging method of an 8051 core-based on-chip system, which belongs to the technical field of integrated circuit design. Background technique [0002] With the development of semiconductor integrated circuits, the scope of integrated circuit design is not only concentrated on DRAM, MPU and ASIC products, but System on Chip (SOC) design has gradually become the focus of current integrated circuit design. SOC design inherits other system-driven technologies and is a wide range of high-complexity and high-value semiconductor products. It is generally defined as integrating a microprocessor, an analog IP core, a digital IP core, and a memory (or an off-chip memory control interface) on a single chip. It is an inevitable trend in the development of integrated circuit technology. Reducing design cost and improving system integration are the main goals of SOC. Low-cost implementation of SOC requires the use of IP core re...

Claims

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Application Information

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IPC IPC(8): G06F11/22
Inventor 袁东风仝红红苗全杨刚强徐祥桐黄权
Owner SHANDONG UNIV
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