An FPGA-based heterosynchronous switchable 
serial port and a method of use thereof, the 
serial port includes a universal asynchronous 
transceiver, a sending register, and a receiving register, and the universal asynchronous 
transceiver is mounted on an APB 
bus for realizing CPU transfer to  The universal asynchronous 
transceiver transmits data, and the described universal asynchronous transceiver is provided with a state detection register, and the sending pin and the receiving pin of the universal asynchronous transceiver are respectively connected to the control end of the sending module FIFO and the receiving module FIFO, and the universal asynchronous transceiver  The 
clock module of the register and the 
field programmable gate array is connected, and the 
serial port can be set to synchronous mode or asynchronous mode through the register of the asynchronous transceiver, and the input end of the receiving module FIFO and the output end of the sending module FIFO are respectively connected  The receiving module and the sending module, the 
clock module of the 
field programmable gate array are respectively connected with the control ends of the receiving channel and the sending channel.  The invention supports two interface forms of synchronous serial port and asynchronous serial port, and is compatible with the UART protocol. In the asynchronous serial port mode, the frequency division precision is improved, the 
bit error rate is reduced, and the stability and accuracy of data are obviously improved.