Serial communication protocols

Abstract

Systems and methods are disclosed which relate to improving synchronization of clocks between a sender and a receiver communicating via an asynchronous serial interface. In a ring topology (130), a master device (105) is connected to a plurality of slaves (S1-S3) communicating using a bi-frequency encoded bit stream. A host device communicates with the master device using a non-return-to-zero data encoding. Each slave (SI-S3) receives data from the master (105) and sends it to the next slave in the ring unaltered unless the master indicates a requirement for a particular data, and transmits placeholder bits with a value of 0 around the ring. A particular slave can 'fill-in' the placeholder bits with the information to be sent back to the master by inverting the placeholder bit. Clock synchronization between a receiving device and a transmitting device is improved using a fractional rate multiplier to generate a data sampling clock from a system clock. By adjusting the denominator, the sampling clock can be tuned to match the baud rate of the asynchronous serial data stream received from the transmitting device. Embodiments described include power management, data acquisition (DAQ), etc.

Description

technical field [0001] The present invention relates to communication networks and, in particular, to improving synchronization of elements in asynchronous serial data networks. Background technique [0002] In data communication there are two different formats used for data transfer: serial and parallel. In serial data transmission, data is transmitted one symbol at a time over a single communication channel or link such as a wire, fiber optic or wireless connection. In parallel data transmission, multiple symbols are transmitted simultaneously on corresponding multiple channels. Data is usually represented in binary format, and symbols can encode 1 or more bits of binary data, such as 1 or 0. [0003] One advantage of serial communication over parallel communication is that fewer physical resources are required to implement a serial interface, such as transmit and receive circuits, printed circuit board area, integrated circuit pins, connectors, and cables. In short, se...

AI Technical Summary

Problems solved by technology

Because each bit is synchronous, errors do not accumulate as each subsequent bit is received, and clock frequency mismatches greater than 20% can be tolerated when using 16x oversampling

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