Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Synchronous and asynchronous switchable serial interface based on FPGA and use method

A serial port, general-purpose asynchronous technology, applied in the direction of instruments, electrical digital data processing, etc., can solve the problem of increased bit error rate, etc., to achieve the effect of reducing bit error rate, improving frequency division precision, stability and accuracy

Inactive Publication Date: 2017-12-08
ZHENGZHOU YUNHAI INFORMATION TECH CO LTD
View PDF1 Cites 21 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] The present invention provides an FPGA-based heterosynchronous switchable serial port and its use method, which are used to solve the problem that the existing UART serial port will increase the bit error rate during the transmission process with the increase of the transmission rate.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Synchronous and asynchronous switchable serial interface based on FPGA and use method
  • Synchronous and asynchronous switchable serial interface based on FPGA and use method
  • Synchronous and asynchronous switchable serial interface based on FPGA and use method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0035] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments It is a part of embodiments of the present invention, but not all embodiments.

[0036] Such as figure 1 As shown, in the existing UART, the signal detector detects the data, sends the control signal to the UART core, the data is processed by the shift register and sent to the UART core, and the baud rate generator generates the baud rate for controlling the serial port The transmission rate on the line, the entire UART is connected to the back-end processing module through the TX / RX serial data line for data transmission, and CTS / RTS is a handshake signal, which is responsible for communicating with the back-end processing stat...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

An FPGA-based heterosynchronous switchable serial port and a method of use thereof, the serial port includes a universal asynchronous transceiver, a sending register, and a receiving register, and the universal asynchronous transceiver is mounted on an APB bus for realizing CPU transfer to The universal asynchronous transceiver transmits data, and the described universal asynchronous transceiver is provided with a state detection register, and the sending pin and the receiving pin of the universal asynchronous transceiver are respectively connected to the control end of the sending module FIFO and the receiving module FIFO, and the universal asynchronous transceiver The clock module of the register and the field programmable gate array is connected, and the serial port can be set to synchronous mode or asynchronous mode through the register of the asynchronous transceiver, and the input end of the receiving module FIFO and the output end of the sending module FIFO are respectively connected The receiving module and the sending module, the clock module of the field programmable gate array are respectively connected with the control ends of the receiving channel and the sending channel. The invention supports two interface forms of synchronous serial port and asynchronous serial port, and is compatible with the UART protocol. In the asynchronous serial port mode, the frequency division precision is improved, the bit error rate is reduced, and the stability and accuracy of data are obviously improved.

Description

technical field [0001] The invention relates to a server data transmission interface, which belongs to the field of chip technology, and in particular to an FPGA-based asynchronously switchable serial port and a use method thereof. Background technique [0002] With the rapid development of information technology, people are faced with increasingly heavy signal processing tasks, and the requirements for serial port transmission rates are getting higher and higher. [0003] At present, the serial port transmission methods commonly used in the market, such as SPI, I2C, UART, GPIO, LVDS, etc., each serial interface has its own packet form and transmission timing, but the above interfaces only support one transmission mode, either asynchronous or synchronous. It does not have the adaptability and adjustability of IP for various situations in actual production and application. Among them, UART is the abbreviation of Universal Asynchronous Receiver / Transmitter, which is called Un...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): G06F13/42G06F13/40
CPCG06F13/42G06F13/4068
Inventor 王凯
Owner ZHENGZHOU YUNHAI INFORMATION TECH CO LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products