Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Serial clock restoring circuit in universal serial bus (USB) 2.0 high-speed mode

A clock and circuit technology, applied in the field of data clock recovery, can solve the problems of superimposed noise and interference, amplitude attenuation, etc.

Pending Publication Date: 2013-01-02
LONTIUM SEMICON CORP
View PDF0 Cites 5 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Due to the low-pass characteristics of the channel, when the data reaches the receiver through the transmission medium, the amplitude will be attenuated, and the external noise and interference will be superimposed.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Serial clock restoring circuit in universal serial bus (USB) 2.0 high-speed mode
  • Serial clock restoring circuit in universal serial bus (USB) 2.0 high-speed mode
  • Serial clock restoring circuit in universal serial bus (USB) 2.0 high-speed mode

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0012] The implementation of this patent is in accordance with the content of Article 3, and the designed circuit meets the speed requirements of USB2.0, specifically as figure 2 , 3 , 4, and 5 are schematic illustrations. The implementation method described in this patent has been taped out and verified in 0.13um and 0.35um processes, and has obvious advantages in power consumption, area and performance.

[0013] The infringement of this patent can generally be judged by analyzing its implementation circuit. If the circuit cannot be obtained, it can be judged by the reverse analysis method of dissecting the chip and taking pictures. Institutions that may infringe include various chip design companies with or without factories, research institutions, schools, etc.

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses a circuit which meets the speed requirements of USB2.0. The circuit is widely applied to asynchronous serial interface receiving ends and has the advantages of being large in data jitter tolerance range, quick in locking time and the like. The implementation method of the circuit is applied to and verified on 0.13 mu m process flow chips and 0.35 mu m process flow chips, and the circuit has obvious advantages in the aspects of power consumption, area and performance. Infringements of the circuit can be generally judged through analyses of implementation circuits of the circuit, and on the condition that the circuits can not be obtained, infringements can be judged according to backward analyses, such as dissection and photography, which are conducted on chips of the circuits. Organizations that can infringe include chip design companies with factories and without factories, research institutions, schools and the like.

Description

1. Technical field [0001] This invention is mainly used in the field of integrated circuits and signal sampling, especially for the data clock recovery in the receiving end of the asynchronous serial signal communication field, which is suitable for low and medium speeds. 2. Technical background [0002] In serial data communication transmission, the transceiver circuit is responsible for converting internal parallel data and external serial data, so it is generally the part with the highest working rate on the data path. At the sending end, the circuit uses the principle of high-speed clock sampling to send the bit data in the parallel data to the transmission medium one by one to realize the conversion from parallel to serial. At the receiving end, the sender and the receiver do not have a shared clock signal for data synchronization. After receiving the data, the receiver needs to recover the clock signal from the received data stream to achieve synchronous operation, clo...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): H03L7/091
CPCH04L7/0338H04L7/0012
Inventor 陈峰邰连梁曾红军李广仁
Owner LONTIUM SEMICON CORP
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com