DAC (Digital Analog Converter) calibrating circuit and calibrating method thereof

Abstract

The invention relates to a DAC calibrating circuit and a calibrating method thereof. The DAC calibrating circuit comprises a first switch, a second switch, a first comparator, a second comparator, a capacitor and a calibrating module, wherein the first switch is connected between an LSB (Least Significant Bit) unit and the capacitor in order to enable the LSB unit to charge the capacitor based onthe control of a first signal; the second switch is connected between the MSB unit and the capacitor in order to enable the MSB unit to charge the capacitor based on the control of a second signal; the in-phase end of the first comparator is connected with connecting points among the MSB unit, the LSB unit and the capacitor; the reversed-phase end of the first comparator is a first fixed voltage;the in-phase end of the second comparator is connected with the in-phase end of the first comparator, the reversed-phase end of the second comparator is a second fixed voltage; and the calibrating module receives a comparative result of the first comparator and the second comparator and regulates the current of the MSB unit and / or the LSB unit in real time. The invention has high calibration accuracy and can be widely used for high-accuracy DAC.

Description

technical field [0001] The present invention relates to a mixed signal circuit, in particular to a DAC (digital-to-analog converter, digital-to-analog converter). Background technique [0002] The n-bit precision current DAC circuit is usually composed of two parts, one part is composed of MSB (Most Significant Bit, the most significant bit) unit current source 2 a -1 unit array, the other part is composed of LSB (Least Significant Bit, least significant bit) unit current source 2 b -1 cell array that satisfies [0003] n=a+b [0004] I MSB = 2 b · I LSB (1) [0005] I total =(2 a -1) I MSB +(2 b -1) I LSB [0006] Among them, n is the number of digits of precision of the DAC circuit, I MSB is the MSB cell current, I LSB is the LSB cell current, I total is the total current of the DAC circuit. [0007] figure 1 It is a schematic diagram of the current-mode DAC structure, in which the left diagram is a schematic diagram of an MSB...

AI Technical Summary

Problems solved by technology

These two design defects will cause a certain error in the comparison result of the comparator, which directly leads to the inability to match the MSB current and the LSB quiescent current well. Therefore, this calibration circuit cannot be applied to a high-precision DAC.

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