47 results about "Universal asynchronous receiver/transmitter" patented technology

The invention relates to the technical field of real-time kernel performance testing of special chips, in particular to a special chip real-time performance evaluation method based on an FPGA (Field Programmable Gate Array), which comprises the following steps: (1) aiming at a real-time system on an ASIC (Application Specific Integrated Circuit) chip, setting an external interrupt source and an interrupt service program through a hardware interrupt controller; (2) two tasks with the same priority are created, scheduling of the tasks is achieved through time slice rotation, and a real dynamic load scene is simulated; (3) configuring an external FPGA (Field Programmable Gate Array) to generate a square wave signal to trigger external interruption of the ASIC chip, receiving a feedback signal, and connecting the FPGA and the GPIO through an external physical connecting line to form a hardware interruption triggering-response closed loop; and (4) realizing nanosecond timestamp capture through a counter built in the FPGA, acquiring time delay data, calculating interrupt response time, and transmitting the time delay data to a PC (Personal Computer) through a UART (Universal Asynchronous Receiver / Transmitter) to calculate a maximum value, a minimum value, an average value and a data jitter range of test data. The method can effectively solve the problem that the traditional internal closed-loop test cannot reflect the real interruption randomness and the dynamic load.

The invention relates to the field of wireless product testing, and provides a multi-device cooperative closed-loop testing method based on state machine driving, and the method comprises the steps: monitoring the data output of a universal asynchronous receiver / transmitter (UART) interface of a tested device in real time; analyzing the data output by the UART interface of the tested equipment to identify the current running state of the tested equipment; dynamically generating at least one control instruction according to a preset state transition rule set and the identified current operation state; distributing the at least one control instruction to corresponding external test equipment to drive the external test equipment to execute corresponding test operation on the tested equipment; and repeatedly executing the steps of monitoring, analyzing, generating the control instruction and distributing, and automatically and continuously propelling the test process based on the response state of the tested equipment until all test items are completed. According to the technical scheme, multi-device closed-loop testing is driven through the state machine, and the testing automation degree and the process continuity are remarkably improved.

The invention relates to the technical field of Internet of Things, in particular to a circuit for simultaneously converting UART (Universal Asynchronous Receiver / Transmitter) to multi-path different level communication, which comprises a double-USB input module, a power supply processing module, a USB-UART core conversion module and a multi-path level conversion module, the double-USB input module comprises an MINI-USB interface J6 and a USB-B interface J8, VBUS pins of the two interfaces are connected in parallel through a Schottky diode and then output to the power supply processing module, and data differential pair pins are connected in parallel and then connected to the USB-UART core conversion module; and the power supply processing module comprises an LDO (Low Dropout Regulator) voltage stabilizing chip and a filter capacitor, and is used for converting 5V voltage output by the double-USB input module into 3.3 V stable voltage. The circuit design that the UART is connected with various different levels for communication is adopted, the tool integration technology is achieved, the design that the two USB ports are connected in parallel is adopted, the compatibility of the USB data line can be effectively improved, the demands of customers are met, and the technical difficulty that one UART bus is connected with multiple USB ports is broken through.

A universal asynchronous receiver / transmitter includes a transmit register including information to be transmitted, a receive register including received information, a frame error check circuit that evaluates contents of the receive register for a frame error, and a control logic. The control logic routes contents of the transmit register to the receive register. During transmission of the contents of the transmit register to the receive register through a reprogrammable pin, the control logic modifies a bit inversion register to produce modified contents to be provided to the receive register. The modified contents cause a frame error. The control logic determines whether the frame error check circuit detects the frame error.

The invention provides a device and a method for converting a CameraLink interface and a WiFi (Wireless Fidelity) interface in a satellite, belongs to the technical field of wireless communication, and aims to solve the problems of insufficient transmission rate, high power consumption of communication equipment, large size and opaque protocol conversion in the existing satellite wireless communication technology. The device comprises a core controller, a wired module, a wireless module, a power supply module, a DDR (Double Data Rate) module, a clock module, a Flash module, a JTAG (Joint Test Action Group) module, a USB-UART (Universal Asynchronous Receiver / Transmitter) interface, an M.2 interface and an SD (Secure Digital) card, and the method comprises the following steps of: sending wired data to a PL end after level conversion and isolation, transmitting the wired data to the wireless module through a PCIe (Peripheral Component Interconnect Express) interface after protocol analysis and format unification, and sending the wired data in a wireless mode; and a receiving end executes an inverse process and recovers to an original wired signal, thereby realizing transparent transmission.

The utility model relates to a quadruped robot-based battery transmit-receive bus structure convenient to disassemble, which comprises a concentrator I and a concentrator II, the concentrator I is connected with a PC terminal, a battery, a motor and an IMU module, the battery is transmitted to the concentrator I through an RS protocol at a bps rate, the motor is transmitted to the concentrator I through a CANFD protocol at an M rate, and the IMU module is connected with the PC terminal. The IMU module transmits bps to the concentrator I through a UART (Universal Asynchronous Receiver / Transmitter) protocol; the concentrator 2 is connected with a UWB positioning module 1, a UWB positioning module 2 and a UWB positioning module 3. The concentrator 2 is connected to a PC terminal through a USBHID + CDC. The system can be used for optimizing the bus structure of the quadruped robot, increasing the control information effect of the robot and improving the running quality of a long-time gait system of the robot.

A connected-vehicle interface module is provided that includes a connected-vehicle controller, a connected-vehicle radio for receiving an activation signal from a first vehicle warning system controller indicating a road condition, and a connected-vehicle interface controller. The connected-vehicle interface controller further includes a microcontroller and a plurality of universal asynchronous receiver transmitters for receiving and transmitting data communicated to the microcontroller through one or more wired connections to at least one of the connected-vehicle controller and the connected-vehicle radio, a memory device in communication with the microcontroller, and a transceiver and one or more communication ports, coupled to the microcontroller, for connection and communication with a connected vehicle road side unit, wherein the activation signal from the first vehicle warning system controller is communicated to the connected vehicle road side unit via the one or more communication ports.

The utility model provides a low-power-consumption frequency conversion washing machine control system, which is applied to the technical field of washing machine control systems and comprises a driving control board and a display board, and information is transmitted between the display board and the driving control board through UART (Universal Asynchronous Receiver / Transmitter) communication; a power supply circuit is configured on the driving control board and comprises an input module, a switch module and an output module, an alternating-current power supply is connected to the input module for filtering and rectifying to generate direct-current voltage and then input the direct-current voltage to the switch module, and the switch module generates corresponding alternating-current voltage according to the switching frequency of a switching tube; various direct-current voltages are output after being filtered and rectified by the output module; the direct-current voltage comprises a direct-current voltage I, a direct-current voltage II and a direct-current voltage III, and the direct-current voltage II is connected to the step-down converter U4 and then is subjected to step-down to form the direct-current voltage III. Basic functions of the washing machine are achieved through mutual cooperation of the driving control board and the display board, and power consumption can be reduced when the washing machine is in a sleep state through circuit design.

A system and method are provided that enables a processor to undergo a functional test of its circuits prior to attachment to a semiconductor package and prior to use in a computing platform. The method of testing chips includes attaching a non-packaged semiconductor circuit to a test bed, loading computer instructions into a memory of the non-packaged semiconductor circuit, and operating the non-packaged semiconductor circuit in a test boot mode and executing the computer instructions in that mode. The operation logs one or more events of the execution of the instructions in the test boot mode and transmits the logs of the one or more events from the non-packaged semiconductor circuit via a joint test action group (JTAG) interface or a universal asynchronous receiver / transmitter (UART) interface.

The invention provides a serial port selection method, device and equipment and a readable storage medium, and is applied to a CPLD (Complex Programmable Logic Device) in UART (Universal Asynchronous Receiver / Transmitter). The method comprises the following steps: receiving a serial port selection instruction issued by an upper computer; the serial port selection instruction carries a baud rate corresponding to a target serial port, and a mapping relation between serial port numbers of optional serial ports and the baud rate is pre-stored in the CPLD; identifying a target serial port according to a serial port selection instruction issued by the upper computer, and connecting the target serial port with the UART path; and generating a corresponding sampling clock and sampling time according to the baud rate corresponding to the target serial port, and completing communication connection with the target serial port by using the sampling clock and the sampling time. According to the technical scheme, the flexibility of serial port switching and the debugging convenience are improved.

The invention provides a chip BootLoader dual-mode configuration system, which belongs to the technical field of chip boot programs, is integrated in a chip ROM (Read Only Memory), and comprises an OTP (One Time Programmable) storage module, a dual-mode control module, a UART (Universal Asynchronous Receiver / Transmitter) communication module, a key generation module, a CRC32 verification module, a QSPI (Quantitative Serial Peripheral Interface) module and a command processing module, therefore, the multi-element scene is adapted, and the compatibility and the flexibility are greatly optimized. And a communication key and a program encryption key are generated by adopting a double-key differentiation mechanism based on the unique information of the chip, so that the security protection capability is remarkably improved, and illegal invasion and data leakage are completely eradicated. Therefore, safe, flexible and reliable chip guiding and configuration are realized, and the application requirements of the embedded chip in the fields of industrial control, automotive electronics, Internet of Things and the like are met.

The utility model belongs to the technical field of GNSS (Global Navigation Satellite System) inertial navigation, and particularly discloses a GNSS inertial navigation performance testing device which comprises a plurality of USB (Universal Serial Bus) interfaces connected with a computer and a plurality of GNSS modules corresponding to the USB interfaces, a linear voltage regulator and a USB-to-UART (Universal Asynchronous Receiver / Transmitter) circuit are connected between each USB interface and the GNSS module, and the USB-to-UART circuit is connected with the computer. According to the utility model, through cooperation of the plurality of USB interfaces, the logic level driving circuit, the CAN bus transceiver, the WHELLTICK level conversion circuit and the FWD level conversion circuit, a plurality of GNSS modules can be tested at the same time, and vehicle levels of the WHELLTICK and the FWD can be converted into TTL levels by using the WHELLTICK level conversion circuit and the FWD level conversion circuit so as to match the level of the GNSS; the logic level driving circuit divides a group of signals into a plurality of groups of same signals, and then the signals are connected to different GNSS module pins, so that the information received by the GNSS is ensured to be the same, the consistency of the GNSS can be tested, a comparison sample can be added, the test efficiency is improved, and a certain test cost is reduced.

The utility model relates to the technical field of circuits, in particular to a motor self-adjusting control circuit and a stamper machine, and the motor self-adjusting control circuit comprises a single-chip microcomputer, an infrared geminate transistor, a stamper motor driving chip and a two-phase stepping motor. A first UART (Universal Asynchronous Receiver / Transmitter) interface of the singlechip is connected with an infrared geminate transistor, a first GPIO (General Purpose Input / Output) interface of the singlechip is connected with an input end of a seal motor driving chip, an output end of the seal motor driving chip is connected with a two-phase stepping motor, and the two-phase stepping motor is connected with one end of a seal; infrared photoelectric signals are detected through the infrared geminate transistors, pulse signals are output to the seal motor driving chip after the single-chip microcomputer receives the infrared photoelectric signals fed back by the infrared geminate transistors, and the rotation angle of the two-phase stepping motor is controlled through the seal motor driving chip, so that the number of rotation turns of the lead screw in the two-phase stepping motor is adjusted, and the seal is achieved. The purpose of controlling the height of the seal is achieved.

The invention relates to a UART (Universal Asynchronous Receiver / Transmitter) serial port and 1-Wire interface conversion circuit. The UART serial port and 1-Wire interface conversion circuit consists of a power supply voltage conversion unit, a UART and 1-Wire signal conversion unit, a 1-Wire signal level conversion unit, a strong pull-up circuit unit and an ESD (Electro-Static Discharge) protection unit. The invention has the advantages that the front-end host / mainboard can realize the operation on the 1-Wire bus load through the communication of the UART serial port, thereby avoiding the tedious processing of the host / mainboard on the 1-Wire signal, and realizing the conversion function between the UART (TTL) serial port and the 1-Wire interface, thereby carrying out the localization function substitution on an imported device DS2480B; through strong pull-up design, ESD protection and the like, the signal transmission reliability of the 1-Wire bus is improved; an RS232 transceiver or an RS422 transceiver can be connected to a UART (TTL) serial port end so as to meet different interface conversion requirements of a host / mainboard.

The invention provides a device for measuring the resistance of tin oxide slurry, and relates to the technical field of electronic component measurement. An upper computer is connected with a main control chip through a UART (Universal Asynchronous Receiver / Transmitter), the main control chip is respectively connected with a power supply, an analog switch, an AHT10 and an analog-to-digital converter, the analog-to-digital converter is respectively connected with the power supply, a reference resistor, a reference voltage chip and the analog switch, and the analog switch is grounded and connected with the reference resistor. According to the invention, the problems of high cost and large limitation of measuring the electrical performance of the MOS sensor in the prior art are solved.

The application relates to the technical field of communication, in particular to a device debugging method, a terminal device and an upper computer, the method is applied to a terminal device, the terminal device comprises an AP subsystem and an SP subsystem, the method comprises the following steps: when the SP subsystem detects that the AP subsystem is hung, switching a universal asynchronous receiver transmitter (UART) interface to a USB channel; the SP subsystem performs handshaking with the upper computer through the USB channel; the SP subsystem performs command interaction with the upper computer through the USB channel, so as to perform transmission of system data between the SP subsystem and the upper computer. The embodiment of the application realizes efficient and complete transmission of system data in the hung state.

Embodiments of the present application relate to the field of communication application layers, and disclose a mesh communication gateway, a system, and a communication method. The mesh communication gateway comprises a first gateway device and a second gateway device which is in communication connection with the first gateway device by means of universal asynchronous receiver / transmitter (UART) communication. The first gateway device is connected to an external communication device and is used for receiving a control command for a Mesh communication peripheral device sent by the external communication device and sending the control command to the second gateway device in UART format. The second gateway device is connected to the Mesh communication peripheral device and is used for executing a control operation on the Mesh communication peripheral device on the basis of a received control command in UART format to obtain response data of the Mesh communication peripheral device, and returning the response data to the external communication device by means of the first gateway device. According to the present application, unified control interaction with an external communication device and a Mesh communication peripheral device by means of a Mesh communication gateway is achieved, and the Mesh communication gateway can serve a plurality of Mesh communication peripheral devices at the same time, thereby broadening the application range of the Mesh communication gateway.

The utility model discloses a 4G data collector control circuit, which relates to the field of communication management, and comprises a 5V power supply input used for providing 5V power supply voltage for the circuit; the USB interface circuit is used for controlling the access of a USB (Universal Serial Bus); the power conversion circuit is used for converting 5V power input into 4V power output; the protocol conversion module control circuit is used for converting a USB (Universal Serial Bus) protocol into a UART (Universal Asynchronous Receiver / Transmitter) protocol; the data processing module control circuit is used for controlling start and stop of the whole circuit; according to the 4G data collector control circuit, all components are integrated on one circuit board to form a numerical control module with a 4G communication function, the integration level is improved, an external processor or an external functional chip does not need to be used for control, and the problem of remote communication of a numerical control device is solved by arranging a 4G communication unit in the circuit.

The utility model discloses a core processing board card used for an industrial control screen, which comprises a power supply circuit, an MCU circuit, a DDR3L circuit and a screen interface circuit, the power supply circuit comprises a U3 power supply circuit, a U6 power supply circuit and a U7 power supply circuit, the U3 is a DDR power supply, the U6 is a 5V voltage stabilizing circuit, the U7 is a system power supply, the MCU is a main control U1 circuit, the MCU circuit comprises a semiconductor, and a DC-DC is arranged in the semiconductor. The power supply circuit, the MCU circuit, the DDR3L circuit and the screen interface circuit of the core processing board card are used in cooperation, the speed from electrifying to entering an operation interface can be greatly increased, the time from electrifying to entering the operation interface is less than 200 ms, the reaction speed is higher when an operator operates on an industrial operation control screen, the experience feeling of the operator is better, and the operation efficiency is improved. The MCU circuit of the core processing board card adopts an HPM6800 semiconductor to support a CAN-FD interface, an Ethernet interface and a UART (Universal Asynchronous Receiver / Transmitter) interface.

A circuit can enable communication between a primary device and one or more secondary devices. This communication can use a Universal Asynchronous Receiver Transmitter (UART) protocol. During operation, the primary device may require information about the baud rate of the secondary device. The UART can operate in reverse polarity mode, and this reverse polarity can be interpreted by the secondary device as a request to enter an auto-baud detection mode. Using reverse polarity mode to enter auto-baud detection mode can prevent excessive delays in UART communication and avoid the need for additional pins to implement the auto-baud detection mode.

The invention discloses a universal asynchronous receiver / transmitter (UART) digital logic simulation architecture system based on VerilogHDL. The system comprises a demand module, a test case TESTCASE module, an instruction model CMDMOD module and an asynchronous serial port model UARTMOD module. The UART digital logic simulation architecture based on VerilogHDL is established, the problems that an existing UART simulation architecture is single in application scene and needs to be continuously modified to be suitable for various application scenes of various items are solved, the UART simulation architecture is suitable for various application scenes of various items through parameter transmission and analysis, and the simulation verification efficiency of various application scenes of UART of various items is improved.

The invention discloses an augmented reality theme park construction system and method based on Beidou satellite positioning, and relates to the technical field of intelligent travel equipment, the system comprises a Beidou positioning module, a central processing module, an AR display module, an inertial measurement unit module, a storage module and a communication module; wherein the Beidou positioning module transmits initial positioning data to the central processing module through a UART (Universal Asynchronous Receiver / Transmitter) serial port, the inertial measurement unit module transmits equipment attitude data to the central processing module through an I2C bus, and the communication module transmits cloud data to the central processing module through a USB (Universal Serial Bus); the storage module provides virtual scene data for the central processing module through an SPI bus, and the central processing module transmits a rendering instruction to the AR display module through a GPIO bus, displays a virtual-real fusion picture according to the rendering instruction, and transmits a touch instruction to the central processing module through an I2C bus. According to the invention, the smoothness and reality of AR experience can be improved.

A system on a chip (SoC) with a Universal Asynchronous Receiver / Transmitter (UART) interface includes a UART interface circuit, a detection circuit, and a control circuit. The UART interface circuit includes: a plurality of UART signal pads for receiving and transmitting signals; and a UART voltage pad for receiving an external operating voltage. The detection circuit is configured to detect the magnitude of the external operating voltage and thereby generate a detection result. The control circuit is configured to determine setting of a supply voltage for the plurality of UART signal pads according to the detection result. The control circuit makes the setting of the supply voltage be compatible with the external operating voltage according to the detection result, wherein the external operating voltage is a lower first voltage or a higher second voltage, and the first lower voltage is equal to an internal device operating voltage of the SoC.

This application discloses a charging method and apparatus, and an electronic device. The charging method includes: in a process of detecting, based on a target voltage level sequence, whether a charger supports a first fast charging protocol, when a first signal line of a charging interface of the electronic device is at a high level, configuring the first signal line as a receive signal line in a universal asynchronous receiver / transmitter UART serial port mode, and configuring a second signal line of the charging interface as a transmit signal line in the UART serial port mode; performing, when a first data packet supporting a second fast charging protocol is received from the charger within a first duration, charging according to the second fast charging protocol; and performing charging according to the first fast charging protocol when the first data packet is not received within the first duration.

A first electronic device of an electronic system of includes a temperature sensor, a first universal asynchronous receiver / transmitter (UART) and a first processor. The temperature sensor is configured to sense a measured temperature value. The first processor is electrically connected to the first UART and the temperature sensor and is configured to set a first baud rate of the first UART as a baud rate setting value corresponding to the next-1-level temperature point based on the measured temperature value changing from a current temperature point to the next-1-level temperature point, and generate an adjustment signal. The second electronic device of the electronic system includes a second UART and a second processor. The second processor is electrically connected to the second UART and is configured to set a second baud rate of the second UART as the baud rate setting value according to the adjustment signal.

The invention discloses a multi-machine communication system compatible with UART and SPI protocols, which belongs to the technical field of communication and comprises a universal synchronous / asynchronous transceiver (USART) host, at least one UART slave and at least one serial peripheral interface (SPI) slave. The word lengths of a universal synchronous / asynchronous receiver / transmitter (USART) host, a universal asynchronous receiver / transmitter (UART) slave and a serial peripheral interface (SPI) slave are configurable, the highest bit is 1 to represent an address or an instruction, and the highest bit is 0 to represent data. The problems that hardware cost, size and power consumption of the system are increased, overall communication efficiency and reliability of the system are reduced due to the problems of delay, signal loss and the like in the hardware conversion process, and rapid deployment and stable operation of the system are not facilitated in the prior art are solved. According to the invention, the flexibility, compatibility, communication efficiency and reliability of a multi-machine communication system can be improved, and increasingly diversified and complex equipment interconnection requirements are met.

The utility model discloses a non-contact UART (Universal Asynchronous Receiver / Transmitter) communication device, which relates to the field of shared charging and comprises a transmitting end and a receiving end. The transmitting terminal comprises a first microprocessor used for generating a UART signal and outputting the UART signal to a coil driving unit; the coil driving unit is used for driving current change based on the UART signal after receiving the UART signal and outputting the current change to the micro coil; compared with the prior art, the utility model has the beneficial effects that non-contact UART (Universal Asynchronous Receiver / Transmitter) communication is realized by utilizing the micro coil (transmitting end) and the switch-type Hall device (receiving end), and transmission data is modulated and demodulated through a magnetic field, so that physical contact abrasion is avoided, and the service life of equipment is prolonged; compared with wireless communication schemes such as Bluetooth, WiFi and the like, the cost of the micro coil and the Hall device is far lower than that of a Bluetooth module and a WiFi module; the method is directly compatible with a standard UART protocol, and the existing charge pal main control logic does not need to be modified

The present application discloses a device debugging method, device, equipment and medium, relating to the field of device maintenance. The method is applied to a debugging unit that is connected to a debugging unit through a cable at one end and connected to the universal asynchronous receiver / transmitter (UART) pins of a unit to be debugged at the other end, and includes: respectively determining whether start bit information is contained in a first preset buffer area and a second preset buffer area; determining the signal line corresponding to the buffer area containing the start bit information as the data sending end signal line of the unit to be debugged, and determining the correspondence between each signal and the data sending end signal line and the data receiving end signal line of the unit to be debugged; connecting the unit to be debugged to a preset data conversion device by using the correspondence, and realizing the conversion between the universal asynchronous transceiver signal and the target debugging signal by using the preset data conversion device, so as to enable the debugging unit to debug the unit to be debugged. The present invention realizes the correct connection of the signal lines between the UART pins and the debugging unit, and can realize plug and play.

The invention relates to the technical field of bio-electricity signal processing, in particular to a portable electroencephalogram sleep monitoring system based on dual-core heterogeneous processing of ADS1299 and STM32F407ZGT6, which comprises an ADS1299 analog front end, according to the design, electroencephalogram signals enter an ADS1299 integrated chip after being subjected to low-pass filtering preprocessing, the signals are collected through the ADS1299 integrated chip, and the signals are transmitted to an STM32F407ZGT6 single chip microcomputer through an SPI (Serial Peripheral Interface) protocol; the micro-processing module and the two STM32F407ZGT6 single-chip microcomputers are connected in series, an SPI communication mode is carried out in a master-slave mode, the master single-chip microcomputer receives collected electroencephalogram signals, and noise reduction is carried out on the signals through a built-in artifact removal deep learning model. The electroencephalogram signals after noise reduction are received from the single-chip microcomputer, and electroencephalogram sleep data are classified through a sleep stage classification model; the Bluetooth communication module uses a CC2640R2F chip, performs data transceiving with the single chip microcomputer through a UART (Universal Asynchronous Receiver / Transmitter) communication interface, and sends the electroencephalogram signal and sleep monitoring data to an upper computer; and the power management module is designed with an efficient power conversion circuit, dynamic power consumption management and an abnormal protection mechanism. The electroencephalogram signal acquisition system has the advantages of high accuracy, high portability and low power consumption.

A circuit may enable communication between a primary device and one or more secondary devices. The communication may utilize a Universal Asynchronous Receiver Transmitter (UART) protocol. In operation, the primary device may require information on the baud rate of the secondary device. The UART may operate in an inverted polarity mode, and this inverted polarity may be interpreted by the secondary device as a request to enter an auto-baud detection mode. Using the inverted polarity mode to enter the auto-baud detection mode may prevent excessive delays in the UART communication and may prevent the need for additional pins to implement the auto-baud detection mode.