1results about How to "Simplify the test environment" patented technology

This application discloses a SoC chip verification method, including: upon receiving a verification instruction, reading register configuration instructions from a preset storage space according to the verification instruction; wherein the SoC chip is connected to a hardware test layer, and the preset storage space is deployed in the hardware test layer; configuring registers according to the register configuration instructions, and starting each component device in the SoC chip after register configuration; obtaining the operating results of each component device, and determining the SoC chip verification result based on the operating results. Applying the technical solution provided in this application can achieve system-level SoC chip performance verification and ensure the accuracy of chip verification results. This application also discloses an SoC chip verification device, equipment, and computer-readable storage medium, all of which have the above-mentioned beneficial effects.