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Interleaved Tunneling Field Effect Transistor

A technology of tunneling field effect and transistors, which is applied in semiconductor devices, semiconductor/solid-state device manufacturing, electrical components, etc., and can solve problems such as unacceptable operating characteristics

Active Publication Date: 2020-07-10
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the operational characteristics of such devices in the art are currently unacceptable for most commercial applications

Method used

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  • Interleaved Tunneling Field Effect Transistor
  • Interleaved Tunneling Field Effect Transistor
  • Interleaved Tunneling Field Effect Transistor

Examples

Experimental program
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Embodiment Construction

[0021] The following disclosure provides many different embodiments, or examples, for implementing different features of the inventive subject matter. Specific examples of components or configurations are described below to simplify the present invention. Of course, these are merely examples and not intended to be limiting. For example, in the description below, forming a first feature on or over a second feature may include embodiments in which the first feature and the second feature are formed in direct contact, and may also include embodiments in which the first feature and the second feature may be formed in direct contact. An embodiment in which the part forms an accessory part such that the first part and the second part are not in direct contact. Furthermore, the present invention may repeat reference numerals and / or letters in various instances. These repetitions are for simplicity and clarity and do not in themselves indicate a relationship between the various embo...

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Abstract

The present invention describes a tunneling field effect transistor with an overlapping structure between source and drain regions to provide a larger tunneling area. The source or drain regions may be doped regions in the semiconductor substrate. Other source or drain regions may be formed by epitaxial deposition over doped regions. A gate is formed over the epitaxial region, wherein the doped and epitaxial regions overlap. Doped regions may be formed in the fin structure, with epitaxial regions and gates formed on the top and sides of the fins. The invention also provides a staggered tunneling field effect transistor.

Description

technical field [0001] The invention relates to the field of tunneling field effect transistors. Background technique [0002] Since the invention of the integrated circuit, the goal has been to make the devices on the integrated circuit smaller and smaller. This provides more functionality on each integrated circuit. However, conventional MOSFETs have some physical limitations as device sizes reach the order of tens of nanometers and operating voltages drop to tens of volts. Therefore, other types of transistors were developed. [0003] One type of transistor is a tunneling field effect transistor (TFET). With this transistor, the tunneling region is adjusted by the voltage applied to the gate near the tunneling region. However, the operational characteristics of such devices in the art are currently unacceptable for most commercial applications. Contents of the invention [0004] In order to solve the defects existing in the prior art, according to one aspect of the...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/772H01L21/335H01L29/08
CPCH01L29/0843H01L29/66409H01L29/772H01L29/7391H01L29/7311H01L29/7851H01L29/49H01L29/165H01L29/0692H01L29/66977H01L21/02428
Inventor 庄绍勋谢易叡张贯宇
Owner TAIWAN SEMICON MFG CO LTD