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Manufacturing method of semiconductor device, semiconductor device and electronic device

A manufacturing method and semiconductor technology, applied in semiconductor devices, semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, etc., can solve the problems of small resistance and high resistance, and achieve the effect of low contact resistance

Active Publication Date: 2019-01-22
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] However, since the local interconnection is connected through polysilicon, the resistance between the gate and the gate or the gate and the source / drain is high, so it is desirable to obtain a local interconnection structure with a small resistance

Method used

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  • Manufacturing method of semiconductor device, semiconductor device and electronic device
  • Manufacturing method of semiconductor device, semiconductor device and electronic device
  • Manufacturing method of semiconductor device, semiconductor device and electronic device

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Experimental program
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Embodiment 1

[0035] Combine below and Figure 3A ~ Figure 3H as well as Figure 4 The manufacturing method of the semiconductor device of the present invention is described in detail.

[0036] First, if Figure 3A As shown, a semiconductor substrate 300 is provided, and an active region 301 , an isolation structure 302 , a gate stack 303 and a source / drain region 304 are formed on the semiconductor substrate 300 .

[0037] The semiconductor substrate 300 may be at least one of the materials mentioned below: silicon, silicon-on-insulator (SOI), silicon-on-insulator (SSOI), silicon-germanium-on-insulator (S-SiGeOI), germanium-on-insulator Silicon oxide (SiGeOI) and germanium on insulator (GeOI) and so on. In addition, other devices, such as PMOS and NMOS transistors, may be formed on the semiconductor substrate. The isolation structure 302 is a shallow trench isolation (STI) structure or a local oxide of silicon (LOCOS) isolation structure. Other CMOS devices may also be formed in the s...

Embodiment 2

[0053] The present invention also provides a semiconductor device manufactured by the method described in Embodiment 1, such as Figure 5 As shown, the semiconductor device includes: a semiconductor substrate 500, a plurality of gate stacks 501 located on the semiconductor substrate 500, and corresponding source / drain regions 502, between the gate stacks 501 and / or the A local interconnection is formed between the gate stack 501 and the source / drain region 502 through a polysilicon film layer 503, wherein the local interconnection is formed by the above method, and the gate stack 501 and the polysilicon film layer 503 are formed through Silicide 504 connection.

Embodiment 3

[0055] The present invention further provides an electronic device including the aforementioned semiconductor device.

[0056] Since the included semiconductor device is packaged at wafer level, it has the advantages brought by this process, and because the above method is used for packaging, the yield rate is high and the cost is relatively low, so the electronic device also has the above advantages.

[0057] The electronic device can be any electronic product or equipment such as mobile phone, tablet computer, notebook computer, netbook, game console, TV, VCD, DVD, navigator, camera, video camera, recording pen, MP3, MP4, PSP, etc. It is an intermediate product with the above-mentioned semiconductor device, for example: a mobile phone motherboard with the integrated circuit, etc. In this implementation, take PDA as an example, such as Figure 6 shown.

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PUM

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Abstract

The invention provides a semiconductor device manufacturing method. The method comprises steps that a semiconductor substrate is provided, a grid stack is formed on the semiconductor substrate, and a gap wall is formed at periphery of the grid stack; partial exposure is carried out to define grid areas for partial interconnection; a photoresist layer for covering the grid stack and the gap wall is formed, and the photoresist layer is partially etched to remove the gap wall in the grid zones for partial interconnection; a polysilicon film layer is deposited on the semiconductor substrate and the grid stack; the polysilicon film layer is etched to remain a part of the polysilicon film layer for partial interconnection, other parts of the polysilicon film layer are removed, along the direction of the grid stack, the areas for partial interconnection extend relative to the polysilicon film layer for partial interconnection; a silicide is formed on an exposed part of the grid stack, and the grid stack and the polysilicon film layer for partial interconnection are connected through the silicide. According to the method, the grid stack and the polysilicon film layer for partial interconnection are connected through the silicide, and thereby relatively low contact resistance is realized.

Description

technical field [0001] The present invention relates to the technical field of semiconductors, in particular to a manufacturing method of a semiconductor device, a semiconductor device and an electronic device. Background technique [0002] Memory devices are widely used in electronic devices to store data, such as dynamic random access memory (DRAM) and static random access memory (SRAM). DRAM generally maintains data by rewriting data into the memory so that it is refreshed periodically. SRAM, on the other hand, can save its internally stored data without refreshing the circuit, has the advantages of high speed, low power consumption, and compatibility with standard processes, and is widely used in PCs, personal communications, consumer electronics (smart cards, digital cameras, multimedia players, etc.) device) and other fields. [0003] As the size of storage devices continues to decrease, on the one hand, the device density is increased, and on the other hand, the cos...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/532H01L21/768
Inventor 李敏吴永玉
Owner SEMICON MFG INT (SHANGHAI) CORP