Power consumption and temperature oriented dynamic and static combined NoC (Network-on-Chip) mapping method
A mapping method and combined technology, applied in the field of network communication, can solve problems such as power consumption increase, weakening NoC advantages, and chip performance impact
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[0059] In this embodiment, the NoC is an on-chip network composed of communication nodes and computing nodes, and the mapping is to map each task on the application feature map to the computing nodes of the NoC; it is assumed that there are N=X×Y×Z communication nodes in the network on chip , the serial number of the communication node is 0,1,...,k,...,N-1, where k represents the serial number of the kth communication node, 0≤k≤N-1, X represents the number of rows of NoC, and Y represents the number of NoC The number of columns, Z represents the number of layers of NoC, such as figure 1 The shown 4×4×1 network on chip has 16 communication nodes in total, and the serial numbers are 0,1,…,15; in this embodiment, as Figure 10 As shown, a NoC mapping method oriented to the dynamic and static combination of power consumption temperature is carried out as follows:
[0060] Step 1. Establish a mapping library through the discrete firefly algorithm for power consumption temperature:...
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