A packet scheduling method for cicq-structured switches based on virtual queue length to coordinate single-multicast contention

A scheduling method and virtual queue technology, applied in the field of high-performance packet switching, can solve problems such as fixed algorithms and poor performance, and achieve the effect of good versatility and practicability

Active Publication Date: 2019-04-05
BEIHANG UNIV
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Problems solved by technology

The RR-based algorithm is relatively fixed, although the complexity is low, the performance is poor

Method used

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  • A packet scheduling method for cicq-structured switches based on virtual queue length to coordinate single-multicast contention
  • A packet scheduling method for cicq-structured switches based on virtual queue length to coordinate single-multicast contention

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Embodiment Construction

[0030] The LVQF scheduling algorithm includes two parts: input scheduling and output scheduling. If multiple identical choices are encountered in the scheduling decision, one of them will be randomly selected.

[0031] The first part, input scheduling

[0032] Step 1 Initialize the input port set I E ={1,2,…,N} and the set of output ports and O E ={1,2,...,N};

[0033] Step 2 If the set O E is empty, the input scheduling ends, and jumps to the output scheduling of the second part; otherwise, in the set O E find E in O j the smallest output port j;

[0034] step 3 If the cross-node buffer XB corresponding to input port i and output port j i,j is empty, and input port i has packets destined for output port j, take W P i The value of is equal to the port number of the union of the input port i unicast header cell and the destination port of the multicast header cell; if XB i,j non-empty or input port i has no packet destined for output port j, then W P i equal to 0;...

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Abstract

The invention discloses a CICQ structure switch packet scheduling algorithm based on virtual queue length coordination single multicast competition. The algorithm provided by the invention includes two parts: input scheduling and output scheduling. In the input scheduling, first find out the output port with the minimum sum of columns and cross-node buffer groups, and then select the destination port of the unicast header cell and the multicast header cell among the input ports that have cells going to the output port, and Set the input port with the fewest elements, calculate the weight of the unicast header cell and the multicast header cell, select the header cell with the largest weight, and transmit it to the corresponding cross-node buffer. In the output scheduling, the weight of the cross-node cache is equal to the sum of the corresponding unicast queue captain and the virtual captains of all the multicast queues whose header cells go to its corresponding output port, and the packet in the cross-node cache with the largest weight leaves the output port. Compared with the typical method, the algorithm provided by the invention has better throughput rate and packet average delay performance.

Description

technical field [0001] The invention belongs to the technical field of high-performance packet switching. Background technique [0002] The CICQ switch in the present invention operates in a synchronous mode, and records fixed-length packets as cells. A complete scheduling includes input scheduling and output scheduling. A CICQ switch with N×N ports maintains N unicast VOQ queues and K multicast MQ (multicast queue) queues on each input port. It is equivalent to being composed of 1×N demultiplexers between N single multicast buffer queues and crossbar buffers (Crossbar Buffer, XB) and N×1 multiplexers between N XBs and output ports. The main feature of CICQ is that XB decouples input competition and output competition to a certain extent, and realizes two-level parallel scheduling. In the first stage, each input arbitrator decides the cell from VOQ or MQ to the corresponding XB. If the XB is full, it cannot continue to transmit cells from the corresponding VOQ or MQ. If ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L12/861H04L12/863H04L12/931H04L12/935H04L49/111
CPCH04L47/62H04L49/20H04L49/30H04L49/3045H04L49/90
Inventor 熊庆旭闫付龙梁佳诚萧翰张元昊
Owner BEIHANG UNIV
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