Silicon carbide semiconductor device

Abstract

The silicon carbide semiconductor device includes a transistor region, a diode region, a gate wiring region, and a gate pad region. The gate pad region and the gate wiring region are respectively arranged so as to be sandwiched by a diode region adjacent to the transistor region and a diode region adjacent to the termination region, and gate electrodes of the gate pad region and the gate wiring region are formed in the region. On the insulating film, the insulating film is formed on the epitaxial layer. This makes it possible to suppress dielectric breakdown of the insulating film in the gate region during switching and avalanche breakdown without degrading the quality of the gate insulating film.

Description

technical field [0001] The present application relates to silicon carbide semiconductor devices. Background technique [0002] Silicon carbide (silicon carbide: SiC) is a semiconductor material having a larger band gap and higher hardness than silicon (Si). For example, SiC is used in power elements such as switching elements and rectifying elements. A power element using SiC has, for example, an advantage of being able to reduce power loss compared to a power element using Si. [0003] A typical semiconductor element using SiC is a metal-oxide-semiconductor field-effect transistor (Metal-Oxide-Semiconductor Field-Effect Transistor: MOSFET). [0004] SiC-MOSFETs are considered to be used, for example, as switching elements used in power converters for driving and controlling loads such as motors. [0005] For example, structures such as those shown in Patent Documents 1 and 2 are disclosed as MOSFETs using SiC. In the MOSFET disclosed in Patent Document 1, an upper sourc...

AI Technical Summary

Problems solved by technology

For example, when polysilicon is used as the gate electrode, the conductivity of polysilicon is not high enough, so when the position of the gate electrode is far from the gate pad, the gate resistance of the MOSFET increases

Therefore, in a MOSFET cell with high gate resistance, a delay occurs between the potential of the gate pad and the potential of the gate electrode according to the time constant determined by the gate resistance of the MOSFET and the capacitance between the source and the gate.

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