System for rapidly starting Linux core in field programmable gate array (FPGA) environment and starting method

A fast startup, kernel technology, applied in the direction of program loading/starting, program control design, instruments, etc., can solve the problems of cumbersome and time-consuming, to improve chip quality, save development costs, save platform construction and debugging time Effect

Active Publication Date: 2017-04-26
HUNAN GOKE MICROELECTRONICS
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Problems solved by technology

And in the process of debugging the kernel, it may also use the network port to download the kernel and mount the network file system
This process wi

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  • System for rapidly starting Linux core in field programmable gate array (FPGA) environment and starting method
  • System for rapidly starting Linux core in field programmable gate array (FPGA) environment and starting method

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Embodiment Construction

[0027] The following will clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only some of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0028] see figure 1 , and the figure is a block diagram of the system structure of quickly starting the Linux kernel under the FPGA environment of the present invention. The system 100 for quickly starting the Linux kernel under the FPGA environment includes a Linux virtual machine 1, a Windows platform 2, a chip 3, an FPGA platform 4, an FPGA platform sub-board 5, and a jlink debugger 6.

[0029] The Linux virtual machine 1 has a Linux kernel compilation environment, and the Windows platform 2 is connected to the L...

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Abstract

The present invention provides a system for rapidly starting a Linux core in a field programmable gate array (FPGA) environment and a starting method. The system comprises a Linux virtual machine, a Windows platform, a function-to-be-verified chip, an FPGA platform, an FPGA platform sub-board, and a jlink debugger. The jlink debugger is connected with the chip. The jlink debugger is connected with the FPGA platform by using the FPGA platform sub-board. The Linux core is rapidly started by using the jlink debugger. Compared with related technologies, the system for rapidly starting the Linux core in the FPGA environment and the starting method have the following beneficial effects that complicate bootrom and uboot steps are omitted, a network file system is not mounted, a lot of time spent on platform building and debugging is saved, a process of connecting with Linux system driver debugging in chip development and verification is realized, reverse verification of the performance of the chip is realized, the chip development period is shortened, the chip quality is improved, and the development cost is saved.

Description

technical field [0001] The invention relates to the technical field of communication terminals, in particular to a system and a starting method for quickly starting a Linux kernel in an FPGA environment. Background technique [0002] Verifying chip functionality during chip development is an important part of electronics. Debugging the Linux kernel during chip verification can effectively verify chip functions, improve chip development quality, and reduce development costs. Therefore, quickly starting the Linux kernel in the FPGA environment has become an important topic for verifying chip functions. [0003] In the traditional arm Linux kernel startup process, first start uboot through bootrom, and then use uboot to start the Linux kernel. And in the process of debugging the kernel, it may also use the network port to download the kernel and mount the network file system. This process will not only become very cumbersome in the FPGA environment, but also the whole proces...

Claims

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Application Information

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IPC IPC(8): G06F9/445G06F9/455
CPCG06F9/44505G06F9/44589G06F9/45504
Inventor 姚劲松姜黎李淼秦刚
Owner HUNAN GOKE MICROELECTRONICS
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