Interconnect circuit with low threshold voltage p-channel transistors for programmable integrated circuits

A technology for interconnecting circuits and threshold voltages, applied in logic circuit coupling/interfaces using field effect transistors, logic circuits using basic logic circuit components, logic circuit connection/interface layout, etc., can solve FPGA performance bottlenecks and other issues

Active Publication Date: 2021-03-16
XILINX INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Interconnect delays, such as those introduced by transistor transmission gates, can create significant bottlenecks in FPGA performance

Method used

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  • Interconnect circuit with low threshold voltage p-channel transistors for programmable integrated circuits
  • Interconnect circuit with low threshold voltage p-channel transistors for programmable integrated circuits
  • Interconnect circuit with low threshold voltage p-channel transistors for programmable integrated circuits

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Embodiment Construction

[0013] This application describes interconnect circuits with low threshold voltage P-channel transistors for programmable integrated circuits (ICs). In one exemplary embodiment, the interconnect circuitry includes one or more high performance complementary metal-oxide-semiconductor (CMOS) transmission gates controlled by memory cells to selectively couple input nodes in the programmable IC to output node. Each of the input and output nodes may be a conductor or wire in the programmable IC, such as a terminal of a logic element or an interconnect segment of a programmable interconnect. For example, interconnect circuitry may couple logic elements to interconnect segments, logic elements to other logic elements, or interconnect segments to other interconnect segments in a programmable interconnect.

[0014] Each high performance CMOS transmission gate circuit includes an N-channel transistor coupled in parallel with a P-channel transistor. P-channel transistors are configured ...

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Abstract

An exemplary interconnect circuit (200) for a programmable integrated circuit (IC) (100) includes an input terminal (218-1) coupled to receive from a node (204) in the programmable IC, coupled to an output terminal (220) coupled to transmit to another node (208) in the programmable IC, first and second control terminals ( 222-1, 222-2), and a complementary metal oxide semiconductor (CMOS) transmission gate (202-1) coupled between the input terminal and the output terminal and coupled to the first and second control terminals. The CMOS transmission gate includes a P-channel transistor (Q2) configured with a low threshold voltage for the CMOS process used to fabricate the programmable IC.

Description

technical field [0001] Embodiments of the present application relate generally to electronic circuits, and in particular to interconnect circuits with low threshold voltage P-channel transistors for programmable integrated circuits. Background technique [0002] An integrated circuit (IC) may be implemented to perform specified functions. One type of IC is a programmable IC, such as a Field Programmable Gate Array (FPGA). FPGAs typically include arrays of programmable slices. These programmable slices may include, for example, Input / Output Blocks (IOBs), Configurable Logic Blocks (CLBs), Dedicated Random Access Memory Blocks (BRAM), Multipliers, Digital Signal Processing Blocks (DSP), Processors, Clock Managers , Delay Locked Loop (DLL), etc. Various logic elements can be interconnected by a programmable interconnect structure, which includes a large number of interconnect segments between interconnect circuits that can be programmed by static memory locations in configur...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03K19/0185H03K19/173H03K19/177
CPCH03K19/018571H03K19/1737H03K19/17736H03K19/1776H01L27/11803
Inventor P·简恩M·J·哈特
Owner XILINX INC
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