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This invention relates to a method for fabricating a silicon carbide power device with a self-aligned region. The steps are as follows: a patterned first mask is fabricated on a drift layer to form a first operating port; ion implantation is performed from the first operating port to form a channel of the second conductivity type; then, a first spacer, a second spacer, and a third spacer are sequentially set to form a P-well, a lightly doped source region, and a heavily doped source region of the second conductivity type; the heavily doped source region is etched and ion implanted to form a plug region of the second conductivity type; and ion implantation is performed on the drift layer without a mask to fabricate a lightly doped JFET region of the first conductivity type. This method solves the technical problem in traditional vertical power MOSFET / IGBT devices where the formation of p-wells, p-channels, n-sources, and deep p-plug regions relies on continuous mask / window formation, which requires multiple photolithography masking steps and introduces accumulated alignment errors.