Method of optimizing page-level flash memory transformation layer

A flash memory conversion layer and flash memory technology, applied in memory systems, instruments, computing, etc., can solve problems such as reducing the lifespan of solid-state disks and affecting the performance of solid-state disks, and achieve the effects of reducing overhead, improving performance and lifespan, and reducing the number of writes

Active Publication Date: 2017-06-09
HUAZHONG UNIV OF SCI & TECH
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AI Technical Summary

Problems solved by technology

However, operations such as cache replacement and garbage collection will bring a large number of flash map page read and update operations. These accesses not only affect the performance of the SSD, but also cause additional erase operations and reduce the life of the SSD.

Method used

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  • Method of optimizing page-level flash memory transformation layer

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Embodiment Construction

[0030] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention. In addition, the technical features involved in the various embodiments of the present invention described below can be combined with each other as long as they do not constitute a conflict with each other.

[0031] Such as figure 1 Shown, the flow process of the inventive method comprises the following steps:

[0032] (1) When an I / O request arrives, look up the physical address of the flash data page corresponding to the request in the mapping table cache, if not found in the cache, then enter step (2), otherwise jump to step (13) ;

[0033] (2) Determine whether the cache space is full, if so, ...

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Abstract

The invention discloses a method of optimizing a page-level flash memory transformation layer and belongs to the field of data storage. By means of the characteristic that an SLC flash memory supports part of writing, a mechanism of writing an in-situ log is adopted to reduce expenditure of access of a flash memory mapping page. The method comprises the following steps of: reserving a small part of the flash memory mapping page as a log region; when the flash memory mapping page is updated, establishing a log unit by all mapping items belonging to the mapping page in cache and adding the log region written to the mapping page by employing a part of writing mechanism; when the log region is written fully or the writing number of times exceeds a certain threshold value, combining and operating the mapping items in the flash memory mapping page and the items of the log page, and writing the same to a new flash memory mapping page; and at the moment, the log region in the new mapping page is empty, receiving an updating operation of the new mapping page and employing an in-situ log writing mechanism again. By reducing the expenditure of access of the flash memory mapping page, purposes of improving the performances of a flash memory solid disc and prolonging the service life are achieved.

Description

technical field [0001] The invention belongs to the field of data storage, and more specifically relates to a method for optimizing a page-level flash conversion layer. Background technique [0002] NAND flash memory (Flash Memory) has the advantages of small size, low power consumption, high performance, etc., so it is widely used as a storage medium in embedded systems, notebook computers, data centers, etc. Flash memory can be divided into SLC (Single-Level Cell), MLC (Multi-Level Cell) and TLC (Triple-Level Cell) according to the storage density. Among them, SLC has the highest performance and reliability, so it is widely used in enterprise and industrial Class SSD. However, flash media itself has some unique limitations, such as no support for overwriting, read and write operations are performed in units of pages, while erase operations are performed in blocks (each block contains multiple pages), and the number of erases is limited wait. In order to overcome these l...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F12/1009
CPCG06F12/1009G06F12/0246G06F2212/7201
Inventor 冯丹李楚王芳华宇周炜
Owner HUAZHONG UNIV OF SCI & TECH
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