Shift register unit, driving method thereof, grid driving circuit, and display panel

A shift register and drive signal technology, which is applied in static memory, digital memory information, instruments, etc., can solve problems such as increased power consumption, decreased drive capability, and extended pull-down time at the output end of the drive signal.

Active Publication Date: 2017-08-11
BOE TECH GRP CO LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] An embodiment of the present invention provides a shift register unit, its driving method, a gate driving circuit, and a display panel, so as to solve the problem that the driving signal output terminal cannot quick

Method used

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  • Shift register unit, driving method thereof, grid driving circuit, and display panel
  • Shift register unit, driving method thereof, grid driving circuit, and display panel
  • Shift register unit, driving method thereof, grid driving circuit, and display panel

Examples

Experimental program
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Effect test

Embodiment 1

[0099] by Figure 5a The structure of the shift register unit shown is taken as an example to describe its working process, in which Figure 5a In the shift register unit shown, the potential of the first reference signal terminal Vref1 is a low potential, and the potential of the second reference signal terminal Vref2 is a high potential. The corresponding input and output timing diagrams are shown in Figure 6a Shown, specifically, select as Figure 6aThere are four stages in the shown input-output sequence diagram, the first stage S1 , the second stage S2 , the third stage S3 and the fourth stage S4 .

[0100] In the first stage S1, Input=0, CK1=0, CK2=1.

[0101] Since CK1=0, both the second switch transistor M2 and the third switch transistor M3 are turned on. The turned-on second switch transistor M2 provides the low potential signal of the input signal terminal Input to the first node A, so the voltage of the first node A is low potential. Since Vref1=0, the fourth ...

Embodiment 2

[0112] by Figure 5b The structure of the shift register unit shown is taken as an example to describe its working process, in which Figure 5b In the shift register unit shown, the potential of the first reference signal terminal Vref1 is a high potential, and the potential of the second reference signal terminal Vref2 is a low potential. The corresponding input and output timing diagrams are shown in Figure 6b Shown, specifically, select as Figure 6b There are four stages in the shown input-output sequence diagram, the first stage S1 , the second stage S2 , the third stage S3 and the fourth stage S4 .

[0113] In the first stage S1, Input=1, CK1=1, CK2=0.

[0114] Since CK1=1, both the second switch transistor M2 and the third switch transistor M3 are turned on. The turned-on second switch transistor M2 provides the high potential signal of the input signal terminal Input to the first node A, so the voltage of the first node A is high potential. Since Vref1=1, the four...

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PUM

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Abstract

The invention discloses a shift register unit, a driving method thereof, a grid driving circuit, and a display panel. The shift register unit comprises an input module, a first control module, a second control module, a third control module, a first output module, and a second output module. By adopting cooperation among the input module, the first control module, the second control module, the third control module, the first output module, and the second output module, pull-down time of a driving signal output end is reduced, and the driving capability of the shift register unit is improved, and power consumption is reduced.

Description

technical field [0001] The invention relates to the field of display technology, in particular to a shift register unit, a driving method thereof, a gate driving circuit and a display panel. Background technique [0002] With the rapid development of display technology, display panels show a development trend of high integration and low cost. Among them, the GOA (Gate Driver on Array, array substrate row driving) technology integrates the TFT (Thin Film Transistor, thin film transistor) gate switch circuit on the array substrate of the display panel to form a scan drive for the display panel, thus saving The bonding (Bonding) area of ​​the gate integrated circuit (IC, Integrated Circuit) and the wiring space of the fan-out (Fan-out) area can not only reduce the product cost in terms of material cost and manufacturing process, but also make the display panel Beautiful design with symmetrical sides and narrow bezels. [0003] Generally, the existing GOA circuit is usually co...

Claims

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Application Information

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IPC IPC(8): G09G3/36G09G3/3266G11C19/28
CPCG09G3/3266G09G3/3677G11C19/28G09G2310/0286G09G2310/08
Inventor 黄炜赟
Owner BOE TECH GRP CO LTD
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