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A method of controlling chip dislocation

A technology for controlling chips and dislocations, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems such as poor chip quality, achieve the effects of reducing production costs, ensuring availability, and increasing area ratio

Active Publication Date: 2019-06-18
HUAZHONG UNIV OF SCI & TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] Aiming at the above defects or improvement needs of the prior art, the present invention provides a method for controlling chip dislocation. By partitioning the chip base circle, different regions of the chip base circle are in different thermal field conditions, thereby solving dislocation problems. Mis-distributed throughout the chip resulting in a technical problem of poor chip quality

Method used

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  • A method of controlling chip dislocation
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Experimental program
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Embodiment 1

[0029] Taking the center of the 8-inch Si base circle as the center, the inner area of ​​the circle with a diameter d1 of 183mm is the core area, the part between the circle with a diameter d2 of 187mm and the core area is the transition area, and the base circle outside the transition area is the edge Area. Introduce argon gas as a protective gas, and use the set window in the RTP rapid heat treatment furnace to heat the temperature of the core area to 1100 °C and the temperature of the edge area to 450 °C within 2 minutes. Subsequently, the base circle was annealed at 450 °C for up to 2 h, and then cooled to room temperature. The test results show that the defects in the core area are significantly reduced, so that a high-quality core area of ​​the base circle can be obtained.

Embodiment 2

[0031] Taking the center of the 8-inch Si base circle as the center, the inner area of ​​the circle with a diameter d1 of 185 mm is the core area, the part between the circle with a diameter d2 of 189 mm and the core area is the transition area, and the base circle outside the transition area is the edge Area. Introduce argon gas as a protective gas, and use the set window in the RTP rapid heat treatment furnace to heat the temperature of the core area to 1250 °C and the temperature of the edge area to 600 °C within 75 seconds. Subsequently, the base circle was annealed at 600 °C for up to 3 h, and then cooled to room temperature. The test results show that the defects in the core area are significantly reduced, so that a high-quality core area of ​​the base circle can be obtained.

Embodiment 3

[0033]Taking the center of the 8-inch Si base circle as the center, the inner area of ​​the circle with a diameter d1 of 189mm is the core area, the part between the circle with a diameter d2 of 193mm and the core area is the transition area, and the base circle outside the transition area is the edge Area. Introduce argon gas as a protective gas, and use the set window in the RTP rapid heat treatment furnace to heat the temperature of the core area to 1300 °C and the temperature of the edge area to 650 °C within 30 seconds. Subsequently, the basic circle was annealed at 650 °C for up to 4 h, and then cooled to room temperature. The test results show that the defects in the core area are significantly reduced, so that a high-quality core area of ​​the base circle can be obtained.

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Abstract

The invention belongs to the field of chip packaging, and discloses a method for controlling the chip dislocation. The method comprises the steps: (a), dividing a wafer of a to-be-processed chip into a core region, a transition region and an edge region, wherein the core region is a circular region which takes the circle center of the wafer of the to-be-processed chip as the center and has a diameter d1, the transition region is an annular region outside the core region, and is located between the core region and the edge region; (b), placing the to-be-processed chip in inert protection gas, respectively heating the core region and the edge region, and carrying out the annealing of the to-be-processed chip, wherein the heating temperature of the core region is higher than the heating temperature of the edge region, thereby enabling the atoms of the vacancy and oxygen gaps of the core region to diffuse, enabling the dislocation to slide to the edge region, and completing the processing of the to-be-processed chip. According to the invention, the method effectively controls the dislocation distribution of the wafer of the chip, improves the proportion of the area of a high-quality region of the wafer of the chip, improves the yield and application performances of the chips, and reduces the production cost.

Description

technical field [0001] The invention belongs to the field of chip packaging, and more specifically relates to a method for controlling chip dislocation. Background technique [0002] Dislocation is a very common defect in crystals. It is essentially a disordered arrangement of the crystal lattice. The atomic lattice in a perfect crystal is periodically arranged in a long-range order, while the crystal with dislocations has a lattice period The dislocation arrangement is interrupted by dislocations; the dislocation density in crystals is usually high, which has a great impact on the properties of crystal materials. Studies have shown that the lattice distortion caused by dislocations in semiconductor crystal devices such as chips is the result of scattering carriers. The center has a serious scattering effect on the carriers, and the high-density dislocation greatly affects the mobility of the carriers in the chip, and the dislocations in the semiconductor form a deep energy ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/02
CPCH01L21/02
Inventor 方海生罗显刚马千里
Owner HUAZHONG UNIV OF SCI & TECH