Digital phase-locked loop realizing infinite precision

Abstract

The invention discloses a digital phase-locked loop realizing infinite precision. The digital phase-locked loop realizing infinite precision includes a first counter, a second counter and a phase frequency detector, and also includes an infinite precision realizing module, wherein the first counter and the second counter are connected with the infinite precision realizing module; the infinite precision realizing module is connected with the phase frequency detector; a counting threshold and a correction threshold are arranged in the infinite precision realizing module; and if the counting value output to the infinite precision realizing module from the second counter or the second counter is greater than the counting threshold, the infinite precision realizing module subtracts the correction threshold from the counting value to obtain a correction counting value, and outputs the correction counting value to the phase frequency detector. The digital phase-locked loop realizing infinite precision can fully avoid losing lock of the digital phase-locked loop because of jumping of the counters by simulating counters realizing infinite precision, and can ingeniously overcome the defect caused by the inherent working mode of the counters, thus saving the cost for hardware expenses and improving working stability of the digital phase-locked loop.

Description

technical field [0001] The invention relates to the technical field of phase-locked loops, in particular to a digital phase-locked loop realizing infinite precision. Background technique [0002] The digital phase-locked loop replaces most of the circuits in the traditional mixed-signal phase-locked loop with digital circuits, which reduces the area cost and shortens the design cycle. At present, there are mainly two implementation methods of all-digital phase-locked loops in the industry, one based on frequency divider architecture and one based on counter architecture. An all-digital phase-locked loop based on a counter architecture, the circuit structure diagram is as follows figure 1 As shown, its working principle is that counter 1 and counter 2 respectively accumulate the clock phases of the reference clock and the digitally controlled oscillator to obtain the frequency information of the two. After the final result passes through the low-pass filter, it is used to c...

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Problems solved by technology

[0004] The technical problem to be solved by the present invention is to provide a digital phase-locked loop that realizes infinite precision in view of the deficiencies of the prior art, so as to overcome the jump of a counter from all 1 output to all 0 output in the prior art digital phase-locked loop The difference between the time and another counter output is too large, resulting in the defect that the digital phase-locked loop loses lock

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