A method and system for predicting junction temperature of power devices

Abstract

The invention discloses a method and a system for predicting a junction temperature of a power device. The method comprises the steps of obtaining an integral structure function curve of a tested device; determining a first chip layer according to a packaging form, a packaging material and a starting point of the integral structure function curve of the tested device; performing layering on the first chip layer according to a slope of a curve segment corresponding to the first chip layer in the integral structure function curve to obtain thermal equivalent layers and corresponding thermal resistance values; and building a thermal equivalent layering model of the chip layer of the tested device according to the thermal equivalent layers and the corresponding thermal resistance values, thereby predicting the junction temperature of the tested device. The thermal equivalent layering model is built for the chip layer by adopting a thermal equivalent layering structure instead of physical layering, so that the thermal equivalent layering model can accurately represent a thermal distribution characteristic of the chip layer in the power semiconductor device; the model can accurately predict the junction temperature of the power device; and the method for building the thermal equivalent layering model is used for all power semiconductor chips, and is convenient to implement and popularize.

Description

technical field [0001] The invention relates to the field of semiconductors, in particular to a method and system for predicting junction temperature of power devices. Background technique [0002] Power semiconductor devices are more and more widely used in power systems, and at least 60% of the world's electric energy is controlled by them. In the future, under the trend of global energy Internet, with large-scale new energy generation and electric vehicles The proportion of mobile unpredictable loads connected to the grid will increase significantly. Therefore, research work on power semiconductor devices has also become a hot spot in recent years, especially high-voltage and high-power semiconductor devices. [0003] Press-connected power semiconductor devices, such as press-connected insulated gate bipolar transistors (Insulated Gate Bipolar Transistor, IGBT), have the advantages of high power density, double-sided heat dissipation, easy series connection and high reli...

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Problems solved by technology

This type of chip model appears in the semiconductor simulation software TCAD. Based on the process simulation simulation chip manufacturing process, it can fully consider the complex structure of the internal cells of the chip. However, there are tens of thousands of cells inside a chip, and the cells are connected in parallel. The structural model of a cell structure cannot be directly equivalent to the structural model of the chip layer, and it is difficult to combine with external simulation, and the application is difficult

The third is the physical layered model of the chip. This type of chip model is mainly used in the finite element model of the chip. The chip is divided into a depletion layer and an equivalent layer according to the physical structure of the active area and the terminal area. The chip model can study the distribution of electrothermal characteristics inside the chip to a certain extent, but the disadvantage of layering according to the physical structure is that the physical size and boundary conditions of each layer are set based on experience, and there is no corresponding theory as a basis for support. The prediction error is large, and the model is relatively complicated, which is not conducive to practical application and promotion

[0006] In summary, the existing methods based on experimental measurement and the method of simulating and predicting the junction temperature by establishing an equivalent thermal model cannot fully characterize the PN junction temperature inside the chip layer, and the junction temperature prediction error is relatively large.

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