CPU (Central Processing Unit) performance optimization method and device based on NUMA (Non-uniform Memory Access) architecture

Abstract

The invention discloses a CPU (Central Processing Unit) performance optimization method and device based on a NUMA (Non-uniform Memory Access) architecture. The method comprises the following steps: acquiring performance parameters and guidance value of a CPU; acquiring the quantity of threads and the quantity of memory controllers; evaluating the dependence degree of the load and performance of the CPU on cache and memory according to the quantity of threads, a calculated amount of each thread and the performance parameters and guidance value of the CPU; segmenting local memory of each node into local memory blocks in a preset quantity according to the dependence degree of the load and performance of the CPU on the cache and memory, wherein each local memory block corresponds to a memory controller in the node; and binding the threads onto a processor core corresponding to each node, and executing computational tasks by utilizing the corresponding local memory blocks. According to the CPU performance optimization method and device based on the NUMA architecture, a remote memory can be prevented from being accessed, and the data transmission speed is increased, so that the performance of the CPU is improved.

Description

technical field [0001] The invention belongs to the technical field of processors, in particular to a CPU performance optimization method and device based on NUMA architecture. Background technique [0002] There are many ways to evaluate processor performance. Basically, the performance of a processor is expressed through its computing power to the data model, and the performance of the processor depends on the data transmission capacity of the cache and memory. [0003] Using the existing NUMA technology (Non-Uniform Memory Access, non-uniform memory access mechanism), all the memory of the system is divided into several blocks, and the system has multiple memory buses, and the processor is connected to a piece of memory through each memory bus. A group, so the NUMA system is divided into several groups, each group is called a node (node), the memory in this node is called local memory (local memory), and the memory in other nodes is for this group It is called remote mem...

AI Technical Summary

Problems solved by technology

The existing CPU performance processing model is to run multiple test threads in the test environment, and each test thread traverses all the memory. However, there are certain defects in this test method. When the processor accesses the data in the remote memory, the data The transmission speed will be reduced, affecting the performance of the CPU

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