UPI (Intel Ultra Path Interconnect) interconnection system capable of reducing backboard stacking

An interconnection system and backplane technology, applied in the field of UPI interconnection system, can solve the problems of many backplane layers and high cost, and achieve the effect of reducing the number of backplane layers and the cost of the backplane

Inactive Publication Date: 2017-11-24
ZHENGZHOU YUNHAI INFORMATION TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] The purpose of the present invention is to provide a UPI interconnection method that reduces the stacking of backplanes, and solve the problems of many backplane layers and high cost caused by the intersection of UPIs on backplanes

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  • UPI (Intel Ultra Path Interconnect) interconnection system capable of reducing backboard stacking
  • UPI (Intel Ultra Path Interconnect) interconnection system capable of reducing backboard stacking
  • UPI (Intel Ultra Path Interconnect) interconnection system capable of reducing backboard stacking

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Embodiment Construction

[0016] In order to clearly illustrate the technical features of the present solution, the present invention will be described in detail below through specific implementation methods and in conjunction with the accompanying drawings. The following disclosure provides many different embodiments or examples for implementing different structures of the present invention. To simplify the disclosure of the present invention, components and arrangements of specific examples are described below. Furthermore, the present invention may repeat reference numerals and / or letters in different instances. This repetition is for the purpose of simplicity and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed. It should be noted that components illustrated in the figures are not necessarily drawn to scale. Descriptions of well-known components and processing techniques and processes are omitted herein to avoid unnecessarily lim...

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Abstract

The invention discloses an UPI (Intel Ultra Path Interconnect) interconnection system capable of reducing backboard stacking, which belongs to the technical field of PCB design. Based on the fact that crossing on a main board does not influence the stacking, UPI crossing is carried out on the main board, UPIs on the backboards are directly interconnected, an upper connector and a lower connector on the PCB backboard are directly interconnected with no crossing, wiring is completed with two wiring layers, the phenomenon that the backboards are crossed and wiring on the same layer can not be realized, and thus, four wiring layers are needed is avoided, the backboard layer number is reduced, and the backboard cost is reduced.

Description

technical field [0001] The invention relates to the technical field of PCB design, in particular to a UPI interconnection system that reduces backplane stacking. Background technique [0002] Such as figure 1 As shown, regarding the 8-way UPI (English: Intel Ultra Path Interconnect, Chinese: Intel Ultra Path Interconnect) topology design, the specification provided by Intel clearly defines that there must be a crossover, so that the performance can be optimized. The design of an 8-way server is generally two CPU motherboards and a backplane for interconnection, and there are some other IOs. Such as figure 2 As shown, in the existing design scheme, 4 CPUs are interconnected in the motherboard to form a circle, and then crossed on the backplane, a CPU corresponds to a connector, and TX and RX are allocated on a connector. Such as image 3 As shown, due to the limitation of the pin spacing of the connector, only one pair of differential signals can be output from each row,...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H05K7/14
CPCH05K7/1449H05K7/1451H05K7/1459
Inventor 宗艳艳薛广营贡维
Owner ZHENGZHOU YUNHAI INFORMATION TECH CO LTD
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