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Extension method of IIC interfaces

An extension method and interface technology, applied in the direction of instruments, electrical digital data processing, digital data processing components, etc., can solve the limitation of access equipment, increase the complexity of hardware wiring and the difficulty of software programming, and the inability of bus transmission distance. Too far, etc., to achieve the effect of increasing additional costs

Inactive Publication Date: 2017-11-28
HUNAN LINENG TECH
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  • Abstract
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  • Claims
  • Application Information

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Problems solved by technology

These methods are mostly aimed at multiple slave device connection scenarios with the same non-modifiable slave address, but for limited access devices due to insufficient drive of IIC itself, or the bus transmission distance cannot be too far due to limited access capacitance of IIC itself, or Due to hardware limitations, it is impossible to access multiple bus level application scenarios, and no suitable solution is given; moreover, the above-mentioned patents often introduce other devices such as CPLD and FPGA, which increases the complexity of hardware routing and the difficulty of software programming

Method used

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  • Extension method of IIC interfaces

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Experimental program
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Embodiment 1

[0036] Embodiment 1: as Figure 1~6 , a kind of expansion method of IIC interface, expand IIC interface by expansion board, expansion board is provided with 4 IIC signal paths; The IIC interface is connected; there are also M IIC devices, M>4.

[0037] The second ends of the four IIC signal paths on the expansion board are respectively connected to four IIC buses.

[0038] The IIC interface on the MCU is the interface of the IIC controller, that is, the IIC interface on the MCU is used, specifically two.

[0039] The IIC interface on the MCU is an IIC interface simulated by a general-purpose IO port, that is, an IIC interface is simulated through an IO interface, specifically one.

[0040] The IIC interface on the MCU is an IIC interface implemented by an IP core, that is, the IP core is used to configure an IIC interface, specifically one.

[0041] Each IIC signal path on the expansion board is provided with a bidirectional bus buffer. A P82B96 chip is preferred.

[0042...

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Abstract

The invention discloses an extension method of IIC interfaces. The IIC interfaces are extended via an extension board, and the extension board is provided with N IIC signal paths; N is an integer, and N>=2; first terminals of the N IIC signal paths on the extension board are respectively connected with N IIC interfaces on an MCU; and second terminals of the N IIC signal paths on the extension board are respectively connected with N IIC buses. The extension method of the IIC interfaces is easy to carry out, and loading capability of the IIC interfaces can be improved.

Description

technical field [0001] The invention relates to an extension method of an IIC interface. Background technique [0002] IIC stands for Integrated Circuit Bus, which is a bidirectional, binary, synchronous serial bus. The bus is a multi-directional control bus. Multiple chips can be connected to the same bus structure, and each chip can be used as a control source for real-time data transmission. The devices hanging on the IIC bus are divided into master and slave. The master is responsible for initializing the data of the IIC bus and generating a clock signal that allows transmission. The slave is a device that has a unique slave address and is addressed by the master. In view of the fact that IIC is easy to use and occupies less interface resources, it is becoming more and more popular in fields such as sensor data acquisition. [0003] In common application scenarios, multiple IIC slave devices are generally directly connected to the bus for communication. However, due to...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/40G06F13/38G06F1/18
CPCG06F1/185G06F13/382G06F13/4068
Inventor 石雪倩陈金玲黎朝晖瞿仕波
Owner HUNAN LINENG TECH
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