Circuit and method for achieving GPIO function on serial peripheral interface device

Abstract

The invention provides a circuit and method for achieving a GPIO function on a serial peripheral interface device. The interface device comprises a master device and a slave device. The master device and the slave device are connected through a communication data line, and a chip select signal pin of the master device and a chip select signal pin of the slave device are connected through a chip select signal line. The holding circuit is provided and comprises a first resistor, a capacitor, a resistor divider circuit and a peripheral device, wherein the first resistor is connected to the chip select signal line in series, one end of the capacitor is connected to the chip select signal pin of the slave device, the other end of the capacitor is grounded, one end of the resistor divider circuit is connected with a power supply circuit, the other end of the resistor divider circuit is grounded, a divider node of the resistor divider circuit is connected to the chip select signal pin of the master device, the peripheral device is connected between the resistor divider circuit and the ground in series and is low-level effective. According to the technical scheme, the circuit and method have the advantage that the GPIO function can be achieved on the chip select signal line without interfering with the chip select signal line.

Description

technical field [0001] The invention relates to the technical field of communication, in particular to a circuit and a method for realizing GPIO functions on a serial peripheral interface device. Background technique [0002] SPI (Serial Peripheral Interface, Serial Peripheral Interface), is a high-speed, full-duplex, synchronous communication bus that occupies four wires on the pins of the chip. More and more chips integrate this communication Protocol, such as AT91RM9200; as the existing chips become more and more integrated, their packages are getting smaller and smaller, so the pins of the chip are getting less and less. Therefore, it is necessary to add GPIO pins on the chip to realize the GPIO function. It is very difficult. The existing method is to implement by adding an IO expansion chip or providing an IO-related SPI controller, but these two implementation methods not only have high cost, but also need to occupy more space on the printed circuit board. Contents ...

AI Technical Summary

Problems solved by technology

[0002] SPI (Serial Peripheral Interface, Serial Peripheral Interface), is a high-speed, full-duplex, synchronous communication bus that occupies four wires on the pins of the chip. More and more chips integrate this communication Protocol, such as AT91RM9200; as the existing chips become more and more integrated, their packages are getting smaller and smaller, so the pins of the chip are getting less and less. Therefore, it is necessary to add GPIO pins on the chip to realize the GPIO function. It is very difficult. The existing method is to implement by adding an IO expansion chip or providing an IO-related SPI controller, but these two implementation methods not only have high cost, but also need to occupy more space on the printed circuit board.

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