Substrate, semiconductor package including substrate, and manufacturing method thereof

Abstract

A substrate includes: a dielectric layer having a first surface and a second surface opposite the first surface; a first circuit layer; and at least one second conductive element. The first circuit layer is disposed adjacent to the first surface of the dielectric layer and includes at least one trace and at least one first conductive element connected to the trace. The first conductive element does not penetrate through the dielectric layer. The second conductive element extends through the dielectric layer. The area of ​​the upper surface of the second conductive element is substantially equal to the area of ​​the upper surface of the first conductive element.

Description

[0001] Cross References to Related Applications [0002] This application claims the benefit and priority of U.S. Provisional Patent Application No. 62 / 356,447, filed June 29, 2016, and U.S. Nonprovisional Patent Application No. 15 / 630,847, filed June 22, 2017, which The US Provisional Patent Application and Non-Provisional Patent Application are hereby incorporated by reference in their entirety. technical field [0003] The present invention relates to substrates, semiconductor packages and methods of manufacture, and more particularly to substrates comprising first and second conductive elements having substantially the same upper surface area, semiconductor packages comprising said substrates, and method for fabricating the substrate. Background technique [0004] In semiconductor packages, conductive vias are included for electrical connection between opposing surfaces of a substrate. For example, a substrate can include a first circuit layer on a first surface and a...

AI Technical Summary

Problems solved by technology

However, the arrangement of the bump pads, traces and vias makes the path through which electrical signals are transmitted longer and occupies a larger area of ​​the first surface of the substrate.

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