Dividing method and device of memory space of flash memory in field-programmable gate array

A storage space and gate array technology, applied in the direction of input/output to record carrier, etc., can solve the problems of increasing the cost of FPGA system, restricting the convenience and flexibility of FPGA data storage, and waste of space, so as to improve convenience and flexibility , Avoid space waste and reduce cost

Active Publication Date: 2018-01-12
SHENZHEN PANGO MICROSYST CO LTD
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Problems solved by technology

There are great limitations on the size and quantity of storage space, which seriously restricts the convenience and flexibility of FPGA data storage, and there is often a lot of space wasted in practical applications, which greatly increases the cost of FPGA systems

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  • Dividing method and device of memory space of flash memory in field-programmable gate array
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  • Dividing method and device of memory space of flash memory in field-programmable gate array

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Embodiment Construction

[0046] In order to make the objectives, technical solutions and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention, but not to limit the present invention.

[0047] figure 1 For the connection schematic diagram of field programmable gate array FPGA and flashing memory FLASH according to an embodiment of the present invention, below in conjunction with figure 1 To describe in detail the connection relationship between the Field Programmable Gate Array FPGA and the flash memory FLASH according to an embodiment of the present invention, as figure 1 As shown, FPGA and parallel FLASH are interconnected, where:

[0048] The clock output port CLK of the FPGA is connected to the clock input port of the parallel FLASH;

[0049] The chip select output...

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Abstract

The embodiment of the invention provides a dividing method and device of a memory space of a flash memory in a field-programmable gate array, and belongs to the technical field of field-programmable gate arrays (FPGA). The dividing method of the memory space of the flash memory in the field-programmable gate array includes the steps that an input number of storage spaces that the memory space of the flash memory in the FPGA is divided into is received, wherein the number is a natural number larger than 0; input sizes of all the storage spaces are received; according to the received number of the storage spaces and the received size of each storage space, the memory space of the flash memory in the FPGA is divided correspondingly. The starting address of each storage space is stored in a register. By the adoption of the dividing method and device of the memory space of the flash memory in the field-programmable gate array, the technical problem is solved that the sizes and number of thestorage spaces are limited, the convenience and flexibility of FPGA data storage are significantly improved, space waste caused by a traditional FPGA memory space dividing method based on parallel FLASH is thoroughly avoided, and the cost of a FPGA system is significantly reduced.

Description

technical field [0001] The invention relates to the technical field of field programmable gate array FPGA, in particular to a method and device for dividing the storage space of flash memory in the field programmable gate array. Background technique [0002] Field Programmable Gate Array (FPGA: Field-Programmable Gate Array) is becoming larger and larger, which puts forward higher requirements for the convenience of FPGA data storage and the cost of the system. Among many FPGA data storage methods, based on flash memory ( FLASH) FPGA data storage method, compared with other FPGA data storage methods, has been widely used due to its user-friendliness and lower system cost, and has become the mainstream FPGA data storage method in the industry. [0003] At present, based on the FPGA storage space division method of parallel FLASH, the FPGA divides the parallel FLASH into 2, 4, 8, 16 equal-sized 2 by controlling the high address of the parallel FLASH. n share. The size and qu...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F3/06
Inventor 赵世赟傅启攀
Owner SHENZHEN PANGO MICROSYST CO LTD
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