Wafer coordinate reading device and method
A technology for reading devices and coordinates, applied in the manufacturing of electrical components, circuits, semiconductor/solid-state devices, etc., can solve the problems of delaying the normal operation of the testing machine, reducing equipment utilization, affecting product quality, etc., to reduce product scratches, The effect of reducing the use of manpower and shortening the time for exception handling
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[0029] In order to describe the technical content, structural features, and achieved effects of the present invention in detail, the following will be described in detail in conjunction with the embodiments and accompanying drawings.
[0030] see Figure 1 to Figure 7 The wafer coordinate reading device of the present invention includes a carrier plate 10, a tray 20 placed on the carrier plate 10 in an adjustable position, a microscope body 30 and a vision device 40 above the carrier plate 10, the carrier plate The tray 20 is placed on one side of the tray 10, and the tray 20 is used to carry the wafer 200, and the other side of the tray 10 is formed with a coordinate diagram 50, and the coordinate diagram 50 corresponds to the wafer 200 , having a number of square areas 51 corresponding one-to-one to the grains 201 of the wafer 200 and having the same size, each of the square areas 51 is marked with the corresponding coordinate value of the grain 201, when it is necessary to ...
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