Method for determining abnormal state of power-on timing sequence of server main board

A technology for locating servers and power-on timing, applied in the server field, can solve problems that affect work efficiency, consume a lot of time and energy, and delay project progress, so as to improve work efficiency and avoid duplication of work

Active Publication Date: 2018-03-13
ZHENGZHOU YUNHAI INFORMATION TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] Every time an abnormality occurs, repeated operations will be performed, and it is necessary to find the pin position information of each power enable signal and powergood signal on the motherboard, which will consume a lot of time and energy.
[0006] When locating abnormal power on power-on, it is necessary to check whether each power is abnormal one by one according to the sequential logic, and to find the pin position of each power signal. This process has a relatively large workload and consumes a lot of time and energy.
And when the same problem occurs on multiple motherboards, the workload will increase exponentially
This will seriously affect work efficiency and delay the progress of the entire project

Method used

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  • Method for determining abnormal state of power-on timing sequence of server main board
  • Method for determining abnormal state of power-on timing sequence of server main board

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Embodiment Construction

[0058] In order to make the purpose, features and advantages of the present invention more obvious and understandable, the technical solutions protected by the present invention will be clearly and completely described below using specific embodiments and accompanying drawings. Obviously, the implementation described below Examples are only some embodiments of the present invention, but not all embodiments. Based on the embodiments in this patent, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of this patent.

[0059] This embodiment provides a method for locating the abnormal state of the power-on sequence of the mainboard of the server, such as figure 1 As shown, the methods include:

[0060] Send a power-on signal to the first power module of the server main board, and judge whether the power-on of the first power module is normal;

[0061]After the first power module is powered on normally,...

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Abstract

The invention provides a method for determining the abnormal state of the power-on timing sequence of a server main board. The method comprises steps of: sending a power-on signal to a first power module of the server main board to determine whether the first power module normally supplies power; and after the first power module normally supplies power, sending a power-on signal to a second powermodule of the server main board; determining whether the power module normally supplies power; after the second power module normally supplies power, sending a power-on signal to a third power moduleof the server main board to determine whether the third power module normally supplies power; after the third power module normally supplies power, performing operations the same as previous operations until all the power modules of the server main board are powered on normally. The method is not required to measure power modules with a multimeter one by one, improves the working efficiency of a main board test process and also avoids repeated work when the main board is abnormal.

Description

technical field [0001] The invention relates to the field of servers, in particular to a method for locating the abnormality of the power-on sequence state of a main board of a server. Background technique [0002] There are more than ten types of aux power and core power on the main board of the server, and the logical design of the main board has strict requirements on the power-on and power-off sequence of each power. The power-down sequence cannot run normally, which causes the motherboard to fail to switch on and off normally, which affects the function of the entire motherboard. [0003] Therefore, this point should be taken into consideration when designing the motherboard, so that when abnormal power-on and power-off occur, the abnormal power can be quickly located and the function of quickly solving the bug can be realized. [0004] In the existing mainboard power design, when power-on abnormality occurs, a multimeter is usually used to measure the enable signal an...

Claims

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Application Information

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IPC IPC(8): G01R31/3177
CPCG01R31/3177
Inventor 陈占良
Owner ZHENGZHOU YUNHAI INFORMATION TECH CO LTD
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