A method for implementing median filtering using fpga

Abstract

The present invention uses FPGA to realize the method of median filtering, utilizes asynchronous FIFO to cache 3 lines of images, then uses sorting machine to filter one line of images, and the filtered image data is temporarily stored back to the original FIFO; then the whole line of images is processed Afterwards, what this FIFO saves is a line of images after filtering, and at this time, this line of image data is taken out from the FIFO and put into the cache, and this FIFO continues to receive a new line of images. The present invention can process the image data, store the processed image data in the cache and receive new image data while processing the image data.

Description

technical field [0001] The invention belongs to the technical field of image processing, and in particular relates to a method for realizing median filtering through FPGA, which can receive new image data while processing image data while putting the processed image data into a cache while processing image data. . Background technique [0002] Because of its hardware structure, FPGA has the advantage of parallel processing, avoiding the disadvantage of single-core CPU serial execution of instructions one by one, or the low degree of parallelism of multi-core CPU. Image processing also develops from a basic serial structure to parallel processing in the hardware structure. Structure, more and more image processing projects choose FPGA as the core of hardware acceleration solution. [0003] Median filtering is a nonlinear smoothing filtering technique, which can overcome the blurring of image details caused by linear filtering under certain conditions, especially for images p...

AI Technical Summary

Problems solved by technology

[0004] In view of the fact that the median filtering algorithm is not as easy to implement with pipeline technology as the average filtering algorithm, and sometimes even when the median filtering algorithm is implemented with FPGA, it is used to cache an entire image and then process it, which greatly limits the processing of FPGA. Advantage

[0005] Therefore obtain a kind of method that realizes median filter by FPGA, is not convenient to adopt pipeline technology to realize median filter, or adopt and buffer a whole image and then process it and cause the problem of larger time overhead, the present invention proposes new An improved solution is used in FPGA to realize the algorithm of median filtering

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