Formation method of shallow trench isolation structure in fdsoi process

Abstract

The invention discloses a formation method for a shallow trench isolation structure in a FDSOI (Fully Depleted Silicon On Insulator) process. The method comprises steps: 1, an FDSOI substrate structure is provided, and a pad oxide layer and a first silicon nitride layer are formed on a top silicon surface; 2, the formation area of a shallow trench is defined through photoetching, a hard mask layerin the shallow trench formation area is opened, and with the hard mask layer as a mask, the top silicon, buried oxide and a body silicon layer are sequentially etched to from shallow trenches; 3, pre-cleaning is carried out, and through controlling the dilution of an HF solution in the pre-cleaning and the cleaning time of the HF solution, the protruding quantity of the top silicon at the edge ofthe shallow trench is reduced; 4, an atomic layer deposition process is adopted for growth of a linear oxide layer; and 5, an HARP process is used to carry out oxide layer filling in the shallow trenches. The consumption of the top silicon in the linear oxidation layer growth process can be reduced, the electrical performance of the device can thus be enhanced, and the electrical performance of the device can reach a required value.

Description

technical field [0001] The invention relates to a method for manufacturing a semiconductor integrated circuit, in particular to a method for manufacturing shallow trench isolation in a fully depleted silicon-on-insulator (Fully Depleted Silicon On Insulator, FDSOI) process. Background technique [0002] In order to meet the requirement of shrinking the size of semiconductor devices in integrated circuit manufacturing, in addition to adopting three-dimensional structure, planar FDSOI provides another effective technical solution. A typical feature of the FDSOI process is that the wafer used has a layer of buried oxide (BOX) and a layer of ultra-thin silicon-on-insulator. In this application, the wafer is usually composed of a silicon liner, and the silicon liner The bottom is called bulk silicon, the buried silicon oxide layer is formed on the surface of the bulk silicon, and the ultra-thin silicon formed on the surface of the buried silicon oxide layer, namely SOI, is called...

AI Technical Summary

Problems solved by technology

In extremely small device scales, since the width and thickness of the active region are inherently small, the size of the loss of the top silicon at the edge of the AA region cannot be ignored relative to the width and thickness of the active region, so Will have a great adverse effect on the electrical properties of the device

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