The present invention provides a multi-
chip stacking packaging structure and a manufacturing method thereof, wherein a plurality of packaging units are stacked on a substrate in sequence along the longitudinal direction, and a plastic encapsulation layer II covers all the packaging units; the packaging unit includes a plastic encapsulation layer I, a
memory chip and an
interposer chip, the
memory chip and the
interposer chip are interconnected through a rewiring layer, and the packaging units are electrically connected through connection bumps. The present invention combines fan-out packaging technology with TSV technology, and does not require each packaging unit to include a substrate, thereby realizing a lightweight packaging structure, and the
signal is vertically transmitted through the
interposer chip, and it is not necessary to process TSV on the
memory chip; the present invention also increases the number of connection points of the memory chip through the rewiring layer, so that the
interconnection between the packaging units is easier and faster to achieve; and the present invention improves the structure of NCF, with the first film layer with low fluidity playing a supporting role to reduce the overflow of the
adhesive film, and the second film layer with high fluidity is melted first, so that the connection bumps are easier to pass through and the cold solder joints are reduced.